參數(shù)資料
型號: M35061-XXXFP
元件分類: 顯示控制器
英文描述: 40 X 17 CHARACTERS CRT CHAR DSPL CTLR, PDSO32
封裝: 0.450 INCH, 1.27 MM PITCH, PLASTIC, SSOP-32
文件頁數(shù): 13/40頁
文件大小: 491K
代理商: M35061-XXXFP
19
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
M35061-XXXSP/FP
MITSUBISHI MICROCOMPUTERS
Fig. 5 Setting example all matrix-outline area
TV Screen
Note : It is not available to set when external synchronous(register EX = “0”)
BR,BG,BB
Line 9
DSP1 08
DSP1 09
DSP1 10
DSP1 16
DSP1 00
Setting example of register
DSP1xx
PHASE0,PHASE1,PHASE2
OSD display area
40 characters
“0”
.....
“0”
“1”
“0”
“1”
ALL24
Horizontal display area all
matrix-outline
ALL24
to characters all matrix-outline
3. Setting matrix outline
The ALL24 register (address 2AF16) allows you to set a matrix
out-line. A matrix outline can be set for each line by using the
DSP1XX register (address 2AC16) .
However, this setting is inhibited if the EX register (address 2B016)
is 0 (external sync). An example of how you set a matrix outline is
shown in Figure 5.
4. Blinking mode
Two patterns blinking by register BLINK3 (address 2A916) or
BLINK bit of display RAM.
Blinking mode is shown in Table 11 (SYRAM do not blink).
Table 11
Blinking mode
Blink OFF
Duty 50%
01
Duty 25%
Duty 75%
0
1
BLINK0
BLINK1
Table 12
Setting of duty ratio
BLINK2
0
1
Cycle
Approximately 1 second (Vertical sync
divided into 1/64)
Approximately 0.5 second (Vertical sync
divided into 1/32)
Table 13
Setting of cycle
0
BLINK3
Blinking mode
at blinking OFF
Blinking
Normal character, reversed
character alternation display
1
Normal
Reverse
Use registers BLINK0, 1, and 2 (address 2A916) to set the duty
ratio and period that determines the blinking time. Tables 12 and
13 list the relationship between the register settings and the duty
ratio and pe-riod.
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