參數(shù)資料
型號: M3455AG8-XXXFP
元件分類: 微控制器/微處理器
英文描述: 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PQFP52
封裝: 10 X 10 MM, 0.65 MM PITCH, PLASTIC, LQFP-52
文件頁數(shù): 76/148頁
文件大?。?/td> 1807K
代理商: M3455AG8-XXXFP
Rev.1.02
Nov 26, 2008
Page 33 of 146
REJ03B0224-0102
455A Group
Fig 34. Timers structure (2)
Note 1: Flag WDF1 is cleared to “0” and the next instruction is skipped when the WRST instruction is executed
while flag WDF1 = “1”.
The WRST instruction is equivalent to the NOP instruction while flag WDF1 = “0”.
2: Flag WEF is cleared to “0” and watchdog timer reset does not occur when the DWDT instruction and
WRST instruction are executed continuously.
3: The WEF flag is set to “1” at system reset or RAM back-up mode.
Data is set automatically from each reload register
when timer underflows (auto-reload function).
111
W32, W31, W30
Timer3 (16)
1 - - 4 - - - - - 9 10 11 12 13 14 15 16
W51, W50
00
W33
XCIN
ORCLK
01
Low-speed OCO
High-speed OCO
11
10
Watchdog reset
signal
reset signal
(Note 2)
D
T
Q
R
DWDT instruction
+
WRST instruction
Reset signal
(Note 3)
(Note 1)
WRST
instruction
Watchdog timer (16)
1 - - - - - - - - - - - - - 16
INSTCK
S
R
Q
WDF1
S
R
Q
WEF
W42
0
1
W43
Timer LC (4)
Reload register RLC (4)
(TLCA)
Register A
STCK
LCD clock
1/2
100
110
101
011
010
000
001
Timer 3
interrupt
T3F
Timer 3 underflow signal
(T3UDF)
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