參數(shù)資料
型號(hào)： M34552M8H-XXXFP
元件分類： 微控制器/微處理器
英文描述： 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP48
封裝： 7 X 10 MM, 0.65 MM PITCH, PLASTIC, QFP-48
文件頁數(shù)： 19/147頁
文件大?。?/td> 1091K
代理商： M34552M8H-XXXFP
Skip condition
Datailed description
Carry
flag
CY
Rev.3.02
Dec 22, 2006
page 113 of 142
REJ03B0023-0302
4552 Group
Continuous
description
–
Overflow = 0
–
(CY) = 0
–
(Mj(DP)) = 0
j = 0 to 3
(A) = (M(DP))
(A) = n
–
0/1
–
1
0
–
0/1
–
Loads the value n in the immediate field to register A.
When the LA instructions are continuously coded and executed, only the first LA instruction is executed and
other LA instructions coded continuously are skipped.
UPTF = 0:
Transfers bits 7 to 4 to register B and bits 3 to 0 to register A. These bits 9 to 0 are the ROM pattern in ad-
dress (DR2 DR1 DR0 A3 A2 A1 A0)2 specified by registers A and D in page p.
When this instruction is executed, be careful not to over the stack because 1 stage of stack register is used.
UPTF = 1:
Transfers bits 9, 8 to register D, bits 7 to 4 to register B and bits 3 to 0 to register A. These bits 7 to 0 are
the ROM pattern in address (DR2 DR1 DR0 A3 A2 A1 A0)2 specified by registers A and D in page p.
When this instruction is executed, be careful not to over the stack because 1 stage of stack register is used.
Adds the contents of M(DP) to register A. Stores the result in register A. The contents of carry flag CY re-
mains unchanged.
Adds the contents of M(DP) and carry flag CY to register A. Stores the result in register A and carry flag CY.
Adds the value n in the immediate field to register A, and stores a result in register A.
The contents of carry flag CY remains unchanged.
Skips the next instruction when there is no overflow as the result of operation.
Executes the next instruction when there is overflow as the result of operation.
Takes the AND operation between the contents of register A and the contents of M(DP), and stores the re-
sult in register A.
Takes the OR operation between the contents of register A and the contents of M(DP), and stores the result
in register A.
Sets (1) to carry flag CY.
Clears (0) to carry flag CY.
Skips the next instruction when the contents of carry flag CY is “0.”
Stores the one’s complement for register A’s contents in register A.
Rotates 1 bit of the contents of register A including the contents of carry flag CY to the right.
Sets (1) the contents of bit j (bit specified by the value j in the immediate field) of M(DP).
Clears (0) the contents of bit j (bit specified by the value j in the immediate field) of M(DP).
Skips the next instruction when the contents of bit j (bit specified by the value j in the immediate field) of
M(DP) is “0.”
Executes the next instruction when the contents of bit j of M(DP) is “1.”
Skips the next instruction when the contents of register A is equal to the contents of M(DP).
Executes the next instruction when the contents of register A is not equal to the contents of M(DP).
Skips the next instruction when the contents of register A is equal to the value n in the immediate field.
Executes the next instruction when the contents of register A is not equal to the value n in the immediate
field.
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