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參數(shù)資料
| 型號(hào)： | M34509G4FP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PDSO24 |
| 封裝： | 5.30 X 10.10 MM, 0.80 MM PITCH, PLASTIC, SSOP-24 |
| 文件頁(yè)數(shù)： | 57/143頁(yè) |
| 文件大?。?/td> | 1056K |
| 代理商： | M34509G4FP |
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Rev.1.03
2009.07.27
page 20 of 140
REJ03B0147-0103
4509 Group
(4) Internal state during an interrupt
The internal state of the microcomputer during an interrupt is as fol-
lows (Figure 14).
Program counter (PC)
An interrupt address is set in program counter. The address to be
executed when returning to the main routine is automatically
stored in the stack register (SK).
Interrupt enable flag (INTE)
INTE flag is cleared to “0” so that interrupts are disabled.
Interrupt request flag
Only the request flag for the current interrupt source is cleared to
“0.”
Data pointer, carry flag, skip flag, registers A and B
The contents of these registers and flags are stored automatically
in the interrupt stack register (SDP).
(5) Interrupt processing
When an interrupt occurs, a program at an interrupt address is ex-
ecuted after branching a data store sequence to stack register. Write
the branch instruction to an interrupt service routine at an interrupt
address.
Use the RTI instruction to return from an interrupt service routine.
Interrupt enabled by executing the EI instruction is performed after
executing 1 instruction (just after the next instruction is executed).
Accordingly, when the EI instruction is executed just before the RTI
instruction, interrupts are enabled after returning the main routine.
(Refer to Figure 13)
Fig. 13 Program example of interrupt processing
Program counter (PC)
............................................................... Each interrupt address
Stack register (SK)
....................................................................................................
Interrupt enable flag (INTE)
.................................................................. 0 (Interrupt disabled)
Interrupt request flag (only the flag for the current interrupt
source) ................................................................................... 0
Data pointer, carry flag, registers A and B, skip flag
........ Stored in the interrupt stack register (SDP) automatically
The address of main routine to be
executed when returning
Fig. 15 Interrupt system diagram
Fig. 14 Internal state when interrupt occurs
T1F
V12
EXF0
V10
Address 4
in page 1
Address 0
in page 1
T2F
V13
Address 6
in page 1
ADF
V22
Timer 1
underflow
Timer 2
underflow
Completion of
A/D conversion
Address C
in page 1
INT pin
(L→H or
H→L input)
SIOF
V23
Serial interface
transmit/receive
completed
Address E
in page 1
Request flag
(state retained)
Enable
bit
Enable
flag
INTE
Activated
condition
EI
RTI
Interrupt
service routine
Interrupt
occurs
Interrupt is
enabled
Main
routine
: Interrupt enabled state
: Interrupt disabled state
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| M34514M6-XXXFP | 4-BIT, MROM, 4.2 MHz, MICROCONTROLLER, PDSO42 |
| M34514M8-XXXFP | 4-BIT, MROM, 4.2 MHz, MICROCONTROLLER, PDSO42 |
| M34513E4SP | 4-BIT, OTPROM, 4.2 MHz, MICROCONTROLLER, PDIP32 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M34509G4HFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34509G4H-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34509G4-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34509T2-CPE | 功能描述:DEV TOOL COMPACT EMULATOR: 4508/ RoHS:否 類別:編程器，開(kāi)發(fā)系統(tǒng) >> 內(nèi)電路編程器、仿真器以及調(diào)試器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 19/Jul/2010 標(biāo)準(zhǔn)包裝:1 系列:* 類型:* 適用于相關(guān)產(chǎn)品:* 所含物品:* |
| M34512M2 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
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