![](http://datasheet.mmic.net.cn/30000/M32196F8UFP_datasheet_2359476/M32196F8UFP_38.png)
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32192/32195/32196 Group Hardware Manual
OVERVIEW
Rev.1.10 REJ09B0123-0110 Apr.06.07
Port
Function 1
Function 2
DRI function
NBD function
Function
Type
State during
reset
State upon
exiting reset
During single-chip and
external extension modes
P01
Input
Hi-Z
During processor mode
DB1
Input/output
Hi-Z
During single-chip and
external extension modes
P02
Input
Hi-Z
During processor mode
DB2
Input/output
Hi-Z
During single-chip and
external extension modes
P03
Input
Hi-Z
During processor mode
DB3
Input/output
Hi-Z
During single-chip and
external extension modes
P04
Input
Hi-Z
During processor mode
DB4
Input/output
Hi-Z
During single-chip and
external extension modes
P05
Input
Hi-Z
During processor mode
DB5
Input/output
Hi-Z
During single-chip and
external extension modes
P06
Input
Hi-Z
During processor mode
DB6
Input/output
Hi-Z
During single-chip and
external extension modes
P07
Input
Hi-Z
During processor mode
DB7
Input/output
Hi-Z
During single-chip and
external extension modes
P10
Input
Hi-Z
During processor mode
DB8
Input/output
Hi-Z
During single-chip and
external extension modes
P11
Input
Hi-Z
During processor mode
DB9
Input/output
Hi-Z
During single-chip and
external extension modes
P12
Input
Hi-Z
During processor mode
DB10
Input/output
Hi-Z
During single-chip and
external extension modes
P13
Input
Hi-Z
During processor mode
DB11
Input/output
Hi-Z
During single-chip and
external extension modes
P14
Input
Hi-Z
During processor mode
DB12
Input/output
Hi-Z
During single-chip and
external extension modes
P15
Input
Hi-Z
During processor mode
DB13
Input/output
Hi-Z
During single-chip and
external extension modes
P16
Input
Hi-Z
During processor mode
DB14
Input/output
Hi-Z
During single-chip and
external extension modes
P17
Input
Hi-Z
During processor mode
DB15
Input/output
Hi-Z
42
VREF0
-
VREF0
-
AVCC0
VREF0
-
43
AVCC0
-
AVCC0
-
AVCC0
-
44
AD0IN0
-
AD0IN0
-
Input
AD0IN0
Input
Hi-Z
45
AD0IN1
-
AD0IN1
-
Input
AD0IN1
Input
Hi-Z
46
AD0IN2
-
AD0IN2
-
Input
AD0IN2
Input
Hi-Z
47
AD0IN3
-
AD0IN3
-
Input
AD0IN3
Input
Hi-Z
48
AD0IN4
-
AD0IN4
-
Input
AD0IN4
Input
Hi-Z
49
AD0IN5
-
AD0IN5
-
Input
AD0IN5
Input
Hi-Z
50
AD0IN6
-
AD0IN6
-
Input
AD0IN6
Input
Hi-Z
51
AD0IN7
-
AD0IN7
-
Input
AD0IN7
Input
Hi-Z
52
AD0IN8
-
AD0IN8
-
Input
AD0IN8
Input
Hi-Z
53
AD0IN9
-
AD0IN9
-
Input
AD0IN9
Input
Hi-Z
54
AD0IN10
-
AD0IN10
-
Input
AD0IN10
Input
Hi-Z
55
AD0IN11
-
AD0IN11
-
Input
AD0IN11
Input
Hi-Z
56
AD0IN12
-
AD0IN12
-
Input
AD0IN12
Input
Hi-Z
57
AD0IN13
-
AD0IN13
-
Input
AD0IN13
Input
Hi-Z
58
AD0IN14
-
AD0IN14
-
Input
AD0IN14
Input
Hi-Z
59
AD0IN15
-
AD0IN15
-
Input
AD0IN15
Input
Hi-Z
TO35(Note 1)
TO36(Note 1)
TO31(Note 1)
TO32(Note 1)
TO33(Note 1)
TO34(Note 1)
TO24(Note 1)
TO25(Note 1)
TO26(Note 1)
TO27(Note 1)
P02
DB2
Symbol
Type
TO22(Note 1)
TO23(Note 1)
31
P05/DB5/
TO26/DD5
P05
DB5
32
P06/DB6/
TO27/DD6
P06
DB6
DB7
DD5(Note 1)
Input/
output
DD6(Note 1)
Input/
output
DD7(Note 1)
Input/
output
TO28(Note 1)
33
P07/DB7/
TO28/DD7
34
P10/DB8/
TO29/DD8
35
P11/DB9/
TO30/DD9
P11
DD8(Note 1)
P10
DB8
TO29(Note 1)
TO30(Note 1)
37
P13/DB11/
TO32/DD11
P13
Input/
output
36
P12/DB10/
TO31/DD10
P12
DB10
DD10(Note 1)
Input/
output
39
P15/DB13/
TO34/DD13
P15
Input/
output
38
P14/DB12/
TO33/DD12
P14
DB12
DD12(Note 1)
Input/
output
40
P16/DB14/
TO35/DD14
P16
DB14
41
P17/DB15/
TO36/DD15
P17
DB15
28
P02/DB2/
TO23/DD2
Pin
No.
DD15(Note 1)
DD13(Note 1)
DB13
DD11(Note 1)
DB11
DD9(Note 1)
DB9
27
P01/DB1/
TO22/DD1
P01
DB1
29
P03/DB3/
TO24/DD3
P03
DB3
30
P04/DB4/
TO25/DD4
P04
DB4
Pin state when reset
DD2(Note 1)
Input/
output
DD3(Note 1)
Input/
output
DD1(Note 1)
Input/
output
Condition
Power
supply
VCC-BUS
AVCC0
DD4(Note 1)
Input/
output
Function
Input/
output
Input/
output
DD14(Note 1)
Input/
output
Input/
output
P07
Table 1.4.1 Pin Assignments of the M32192F8xFP, M32195F4xFP, and M32196F8xFP (2/4)
Note 1: The pins outputted at two places.
1.4 Pin Assignments