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22. Intelligent I/O
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Figure 22.6 G1TM0 to G1TM7 Registers and G1POCR0 to G1POCR7 Registers
Waveform Generating Control Register 1j (j=0 to 7)
Symbol
Address
After Reset
G1POCR0
011016
0000 X0002
G1POCR1 to G1POCR3
011116, 011216, 011316
0X00 X0002
G1POCR4 to G1POCR7
011416, 011516, 011616, 011716
0X00 X0002
RW
Bit Name
Function
Bit
Symbol
MOD0
MOD1
MOD2
(b3)
Operating Mode
Select Bit
Output Initial Value
Select Bit(6)
IVL
RLD
INV
0: "L" output as default value
1: "H" output as default value
RW
Base Timer Reset Enable
Bit(4)
BTRE
0: Disables base timer reset when
bit 15 in the base timer overflows
1: Enables base timer reset when
bit 9 in the base timer overflows(7)
Inverse Output Function
Select Bit(5)
b1
0
1
0
1
b0
0
1
0
1
0
1
0
1
: Single waveform output mode
: SR waveform output mode(1)
: Phase-delayed waveform
output mode
: Do not set to this value
: Do not set to this value(2)
: Use communication function
output(3)
0: Output is not inversed
1: Output is inversed
b2
0
1
G1POj Register Value
Reload Timing Select Bit
NOTES:
1. This setting is enabled only for even channels. In SR waveform output mode, values written to the
corresponding odd channel (next channel after an even channel) are ignored. Even channels provides
waveform output. Odd channels provides no waveform output.
2. To receive data in UART mode, set the G1POCR2 register to "0000 01102".
3. This setting is enabled only for channels 0 and 1. To use the ISTxD1 pin, set the MOD2 to MOD0 bits
in the G1POCR0 register to "1112". To use the ISCLK1 pin for an output, set the MOD2 to MOD0 bits
in the G1POCR1 register to"1112". Do not set the MOD2 to MOD0 bits to "1112" except in channels 0
and 1 and for the communication function.
4. The BTRE bit is provided in the G1POCR0 register only. Set each bit 6 in the G1POCR1 to
G1POCR7 registers to "0".
5. The inverse output function is the final step in waveform generating process. When the INV bit is set
to "1", an "H" signal is provided a default output by setting the IVL bit to "0"; and an "L" signal is
provided by setting it to "1".
6. To provide either "H" or "L" signal output set in the IVL bit, set the FSCj bit in the G1FS register to "0"
(the time measurement function selected) and IFEj bit in the G1FE register to "1" (functions for
channel j enabled). Then set the IVL bit to "0" or "1".
7. When the BTRE bit is set to "1", set the BCK1 and BCK0 bits in the G1BCR0 register to "112" (f1) and
the UD1 and UD0 bits in the G1BCR1 register to "002" (counter increment mode).
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
0: Reloads the G1POj register when
value is written
1: Reloads the G1POj register when
the base timer is reset
b7
b6
b5
b4
b3
b2
b1
b0
Time Measurement Register 1j (j=0 to 7)
RW
RO
Function
Setting Range
b15
b8
Symbol
G1TM0 to G1TM2
G1TM3 to G1TM5
G1TM6, G1TM7
Address
010116 - 010016, 010316 - 010216, 010516 - 010416
010716 - 010616, 010916 - 010816, 010B16 - 010A16
010D16 - 010C16, 010F16 - 010E16
After Reset
Indeterminate
The base timer value is stored every
measurement timing
b7
b0