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Mitsubishi microcomputers
M16C / 62P Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Electrical Characteristics
224
Under
development
Preliminary Specifications Rev.1.0
Specifications in this manual are tentative and subject to change.
2.75.5
Typ.
Max.
Unit
Parameter
VCC1, VCC2
5.0
Supply voltage(VCC1
≥VCC2)
Symbol
Min.
Standard
Analog supply voltage
VCC1
AVcc
V
0
Analog supply voltage
Supply voltage
VIH
I OH (avg)
HIGH average
output current
mA
Vss
AVss
0.8VCC2
V
VCC2
0.2VCC2
0.2VCC1
0
LOW input
voltage
0.16VCC2
I OH (peak)
HIGH peak output
current
HIGH input
voltage
-5.0
-10.0
P00 to P07, P10 to P17, P20 to P27,P30 to P37,
P40 to P47, P50 to P57, P60 to P67,P72 to P77,
P80 to P84,P86,P87,P90 to P97,P100 to P107,
P31 to P37, P40 to P47, P50 to P57, P120 to P127, P130 to P137
V
0.8VCC2
0.5VCC2
VCC2
(data input function during memory expansion and microprocessor modes)
P00 to P07, P10 to P17, P20 to P27, P30 (during single-chip mode)
P00 to P07, P10 to P17, P20 to P27, P30
LOW peak output
current
10.0
5.0
mA
f (XIN)
Main clock input oscillation frequency
(Note 4)
LOW average
output current
I OL (peak)
mA
I OL (avg)
V
P00 to P07, P10 to P17, P20 to P27,P30 to P37,
P40 to P47, P50 to P57, P60 to P67,P72 to P77,
P80 to P84,P86,P87,P90 to P97,P100 to P107,
P00 to P07, P10 to P17, P20 to P27,P30 to P37,
P40 to P47, P50 to P57, P60 to P67,P70 to P77,
P80 to P84,P86,P87,P90 to P97,P100 to P107,
P00 to P07, P10 to P17, P20 to P27,P30 to P37,
P40 to P47, P50 to P57, P60 to P67,P70 to P77,
P80 to P84,P86,P87,P90 to P97,P100 to P107,
P70 , P71
0.8VCC1
6.5V
VIL
20 X VCC-44
VCC=3.0 to 5.5V
VCC=2.7 to 3.0V
0
MHz
16
f (XCIN)Sub-clock oscillation frequency
kHz
50
32.768
P110 to P117, P120 to P127, P130 to P137, P140, P141
Note 1: Referenced to VCC = VCC1 = VCC2 = 2.7 to 5.5V at Topr = -20 to 85
°C / -40 to 85 °C unless otherwise specified.
Note 2: The mean output current is the mean value within 100ms.
Note 3: The total IOL (peak) for ports P0, P1, P2, P86, P87, P9, P10, P11, P140 and P141 must be 80mA max. The total IOL (peak)
for ports P3, P4, P5, P6, P7, P80 to P84, P12, and P13 must be 80mA max. The total IOH (peak) for ports P0, P1, and P2
must be -40mA max. The total IOH (peak) for ports P3, P4, P5, P12, and P13 must be -40mA max. The total IOH (peak) for
ports P6, P7, and P80 to P84 must be -40mA max. The total IOH (peak) for ports P86, P87, P9, P10, P11, P140, and P141
must be -40mA max.
Note 4: Relationship between main clock oscillation frequency, PLL clock oscillation frequency and supply voltage.
0.8VCC1
V
VCC1
P60 to P67, P72 to P77, P80 to P87, P90 to P97, P100 to P107,
XIN, RESET, CNVSS, BYTE
P110 to P117, P140, P141,
P31 to P37, P40 to P47, P50 to P57, P120 to P127, P130 to P137
P00 to P07, P10 to P17, P20 to P27, P30 (during single-chip mode)
V
0.2VCC2
0
(data input function during memory expansion and microprocessor modes)
P00 to P07, P10 to P17, P20 to P27, P30
P60 to P67, P70 to P77, P80 to P87, P90 to P97, P100 to P107,
XIN, RESET, CNVSS, BYTE
P110 to P117, P140, P141,
f (Ring)Ring oscillation frequency
MHz
1
f (PLL)PLL clock oscillation frequency (Note 4)
46.67 X VCC-
116
VCC=3.0 to 5.5V
VCC=2.7 to 3.0V
10
MHz
24
f (BCLK)CPU operation clock
0
MHz
24
TSU(PLL)PLL frequency synthesizer stabilization wait time
VCC=5.0V
VCC=3.0V
50
20
ms
Main clock input oscillation frequency
16.0
0.0
f(X
IN
)operating
maximum
frequency
[MH
Z
]
Supply voltage
[V] (main clock: no division)
5.5
3.0
10.0
2.7
20 x VCC-44MHZ
PLL clock oscillation frequency
24.0
0.0
f(PLL)
operating
maximum
frequency
[MH
Z
]
Supply voltage
[V] (PLL clock oscillation)
5.5
10.0
2.7
3.0
46.67 x VCC-116MHZ
Table 1.26.2. Recommended Operating Conditions (Note 1)