
VCC1 = VCC2 = 5V
M16C/62P Group (M16C/62P, M16C/62PT)
5. Electrical Characteristics (M16C/62P)
4
8
f
o
4
0
2
,
1
0
p
e
S
0
3
.
2
.
v
e
R
Z
0
3
2
0
-
1
0
B
3
0
J
E
R
page 46
Figure 5.5 Timing Diagram (3)
Measuring conditions :
VCC1=VCC2=5V
Input timing voltage : Determined with VIL=1.0V, VIH=4.0V
Output timing voltage : Determined with VOL=2.5V, VOH=2.5V
Memory Expansion Mode, Microprocessor Mode
BCLK
HOLD input
HLDA output
P0, P1, P2,
P3, P4,
P5_0 to P5_2 (1)
(Common to setting with wait and setting without wait)
NOTES:
1. These pins are set to high-impedance regardless of the input level of the
BYTE pin, PM06 bit in PM0 register and PM11 bit in PM1 register.
th(BCLK–HOLD)
tsu(HOLD–BCLK)
(Effective for setting with wait)
td(BCLK–HLDA)
Hi–Z
RDY input
tsu(RDY–BCLK)
th(BCLK–RDY)
BCLK
RD
(Multiplexed bus)
WR, WRL, WRH
(Separate bus)
RD
(Separate bus)