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9. Interrupts
page 62
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9.2.2 Relocatable Vector Tables
The 256 bytes beginning with the start address set in the INTB register comprise a reloacatable vector
table area. Table 9.2 lists the relocatable vector tables. Setting an even address in the INTB register
results in the interrupt sequence being executed faster than in the case of odd addresses.
Software interrupt
number
Reference
Vector address (1)
Address (L) to address (H)
0
11
12
13
14
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
63
to
10
15
16
5
6
7
8
4
9
1 to 3
Interrupt source
BRK instruction
INT3
SI/O3, INT4
SI/O4, INT5
IC/OC interrupt 1, I 2C bus interface
IC/OC interrupt 0
(2)
DMA0
DMA1
Key input interrupt
A/D
UART0 transmit
UART0 receive
UART1 transmit
UART1 receive
Timer A0
Timer A1
Timer A2
Timer A3
Timer A4
Timer B0
Timer B1
Timer B2
INT0
INT1
INT2
Software interrupt
UART 2 bus collision detection
UART2 transmit, NACK2 (3)
UART2 receive, ACK2 (3)
(4)
IC/OC base timer, SCL/SDA
(4)
M16C/60, M16C/20
series software
manual
INT interrupt
Timer S
Multi-Master I2C bus
interface
Serial I/O
INT interrupt
Serial I/O
DMAC
Key input interrupt
A/D convertor
Serial I/O
Timer
INT interrupt
M16C/60, M16C/20
series software
manual
(5)
(Reserved)
+0 to +3 (000016 to 000316)
+44 to +47 (002C16 to 002F16)
+48 to +51 (003016 to 003316)
+52 to +55 (003416 to 003716)
+56 to +59 (0038 16 to 003B16)
+68 to +71 (004416 to 004716)
+72 to +75 (0048 16 to 004B16)
+76 to +79 (004C16 to 004F16)
+80 to +83 (005016 to 005316)
+84 to +87 (005416 to 005716)
+88 to +91 (0058 16 to 005B16)
+92 to +95 (005C16 to 005F16)
+96 to +99 (006016 to 006316)
+100 to +103 (0064 16 to 006716)
+104 to +107 (0068 16 to 006B16)
+108 to +111 (006C16 to 006F16)
+112 to +115 (0070 16 to 007316)
+116 to +119 (0074 16 to 007716)
+120 to +123 (0078 16 to 007B16)
+124 to +127 (007C16 to 007F16)
+128 to +131 (0080 16 to 008316)
+252 to +255 (00FC16 to 00FF16)
+40 to +43 (0028 16 to 002B16)
+60 to +63 (003C16 to 003F16)
+64 to +67 (004016 to 004316)
+20 to +23 (0014 16 to 001716)
+24 to +27 (0018 16 to 001B16)
+28 to +31 (001C16 to 001F16)
+32 to +35 (0020 16 to 002316)
+16 to +19 (0010 16 to 001316)
+36 to +39 (0024 16 to 002716)
to
(5)
(6)
NOTES:
1. Address relative to address in INTB.
2. Use the IFSR6 and IFSR7 bits in the IFSR register to select.
3. During I2C bus mode, NACK and ACK interrupts comprise the interrupt source.
4. Use the IFSR26 and IFSR27 bits in the IFSR2A register to select.
5. These interrupts cannot be disabled using the I flag.
6. Bus collision detection:
During IEBus mode, this bus collision detection constitutes the cause of an interrupt.
During I2C Bus mode, however, a start condition or a stop condition detection constitutes the cause of an interrupt.
Table 9.2 Relocatable Vector Tables