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Appendix 2. Functional Difference
page 326
8
2
3
f
o
5
0
2
,
5
1
.
r
a
M
0
.
1
.
v
e
R
0
1
0
-
2
0
2
0
B
9
0
J
E
R
)
T
6
2
/
C
6
1
M
,
A
6
2
/
C
6
1
M
(
p
u
o
r
G
A
6
2
/
C
6
1
M
Appendix 2.2 Differences between M16C/26A and M16C/26
Item
M16C/26A
M16C/26
Clock Generation
4 circuits (Main clock oscillation circuit,
3 circuits (Main clock oscillation circuit,
Circuit
Sub clock oscillation circuit,
on-chip oscillator,
on-chip oscillator)
PLL frequency synthesizer)
System Clock
On-chip oscillator
Main clock
Source After Reset
(Initial value "1" of CM21 bit)
(Initial value "0" of CM21 bit)
(Initial value of the CM21
bit in the CM2 register)
On-chip Oscillator Clock Selectable (8MHz/1MHz/500KHz)
Fixed (1MHz)
PACR2 to PACR0 in Necessary to set after reset
No PACR register
the PACR register
48pin:"1002", 42pin:"0012"
IFSR20 bit in the
Necessary to set to "1" after reset
No IFSR2A register
IFSR2A register
External Interrupt
________
8 causes (INT2 added)
7 causes
13 pin (48-pin version)
________
P84/INT2/ZP
IVCC
Function
P70, P71
N-ch open drain output and CMOS
N-ch open drain output
output are selectable by S/W
A/D Input Pin
12 channels
8 channels
(48-pin version)
A/D operation Mode 8 modes (single, repeat, single sweep,
5 modes (single, repeat, single sweep,
repeat sweep mode 0, repeat sweep
mode 1, simultaneous sampling,
mode 1)
delayed trigger mode 0, delayed
trigger mode 1)
1 shunt current measurement function
is available
Timer B Operation
5 modes (timer, event counter, pulse
4 modes (timer, event counter, pulse
Mode
periods measurement, pulse width
measurment, A/D trigger)
measurment)
1 shunt current measurement function
is available
CRC Calculation
Available (compatible to CRC-CCITT
Not available
and CRC-16 methods)
Three-phase motor
Waveform output/Switching port output Waveform output/Switching port output
Control
by software is enabled
by software is disabled
Position data retention function
No position data retention function
Digital Debounce
_______ _____
This function is in the NMI/SD pin and
Not available
Function
________
INT5 pin
3 pin (48-pin version)
P90/CLKOUT/TB0IN/AN30
P90/TB0IN
function
(CLKOUT: f1, f8, f32, and fC output)
UART1 Compatible
Switching to P64 to P67 or P70 to P73
P64 to P67
pin
is enabled
Flash Memory
Protection to blocks 0, 1 by FMR02 bit
Protection to blocks 0,1 by FMR02 bit
Protect Function
Protection to the blocks 0 to 3 by
FMR16 bit
Package
48P6Q, 42P2R
48P6Q
Note. Since the emulator between the M16C/26A and M16C/29 group are same, all functions of M16C/29
are built in the emulator. When evaluating M16C/26A group, do not access to the SFR which is not built
in M16C/26A group.
Refer to Hardware Manual about detail and electrical characteristics.