![](http://datasheet.mmic.net.cn/30000/M30260M3A-XXXGP-U5_datasheet_2358673/M30260M3A-XXXGP-U5_225.png)
16. Programmable I/O Ports
page 211
8
2
3
f
o
5
0
2
,
5
1
.
r
a
M
0
.
1
.
v
e
R
0
1
0
-
2
0
2
0
B
9
0
J
E
R
)
T
6
2
/
C
6
1
M
,
A
6
2
/
C
6
1
M
(
p
u
o
r
G
A
6
2
/
C
6
1
M
16. Programmable I/O Ports
Note
There is no external connections for port P60 to P63, P92 and P93 in the M16C/26A (42-pin version)
The programmable input/output ports (hereafter referred to simply as “I/O ports”) consist of 39 lines P15 to
P17, P6, P7, P8, P90 to P93, P10 for the 48-pin version, or 33 lines P15 to P17, P64 to P67, P7, P8, P90 to
P91, P10 for the 42-pin version. Each port can be set for input or output every line by using a direction
register, and can also be chosen to be or not be pulled high in sets of 4 lines.
Figures 16.1 to 16.4 show the I/O ports. Figure 16.5 shows the I/O pins.
Each pin functions as an I/O port, a peripheral function input/output.
For details on how to set peripheral functions, refer to each functional description in this manual. If any pin
is used as a peripheral function input, set the direction bit for that pin to “0” (input mode). Any pin used as an
output pin for peripheral functions is directed for output no matter how the corresponding direction bit is set.
16.1 Port Pi Direction Register (PDi Register, i = 1, 6 to 10)
Figure 16.1.1 shows the direction registers.
This register selects whether the I/O port is to be used for input or output. The bits in this register corre-
spond one for one to each port.
16.2 Port Pi Register (Pi Register, i = 1, 6 to 10)
Figure 16.2.1 shows the Pi registers.
Data input/output to and from external devices are accomplished by reading and writing to the Pi register.
The Pi register consists of a port latch to hold the output data and a circuit to read the pin status. For ports
set for input mode, the input level of the pin can be read by reading the corresponding Pi register, and
data can be written to the port latch by writing to the Pi register.
For ports set for output mode, the port latch can be read by reading the corresponding Pi register, and
data can be written to the port latch by writing to the Pi register. The data written to the port latch is output
from the pin. The bits in the Pi register correspond one for one to each port.
16.3 Pull-up Control Register 0 to Pull-up Control Register 2 (PUR0 to PUR2 Registers)
Figure 16.3.1 shows the PUR0 to PUR2 registers.
The bits in the PUR0 to PUR2 registers can be used to select whether or not to pull the corresponding port
high in 4 bit units. The port chosen to be pulled high has a pull-up resistor connected to it when the
direction bit is set for input mode.
____________
Also, P67 is connected to a pull-up resistor when the CNVSS pin is “H”, and the RESET pin is “L”.