
338
A-D Converter
M
i
t
s
u
M
S
b
i
s
3
M
h
0
I
C
i
m
2
R
i
1
O
c
r
8
C
o
c
o
G
M
m
p
r
P
u
t
u
T
e
r
p
R
s
o
U
S
I
N
G
L
E
-
C
H
I
P
1
6
-
B
I
T
C
M
O
O
E
In repeat sweep mode 0, choose functions from those listed in Table 2.8.5. Operations of the circled items
are described below. Figure 2.8.11 shows timing chart, and Figure 2.8.12 shows the set-up procedure.
2.8.5 Operation of A-D Converter (in repeat sweep mode 0)
Operation
Table 2.8.5. Choosed functions
Item
(1) Setting the A-D conversion start flag to “1” causes the A-D converter to start the conversion
on voltage input to the AN
0
pin.
(2) After the A-D conversion of voltage input to the AN
0
pin is completed, the content of the
successive comparison register (conversion result) is transmitted to A-D register 0.
(3) The A-D converter converts all pins selected by the user. The conversion result is transmitted
to A-D register i corresponding to each pin every time A-D conversion on the pin is com-
pleted. The A-D conversion interrupt request bit does not go to “1”.
(4) The A-D converter continues operating until the A-D conversion start flag is set to “0” by
software.
Figure 2.8.11. Operation timing of repeat sweep mode 0
Item
Set-up
Set-up
Operation clock
φ
AD
Divided-by-4 f
AD
/ divided-
by-2 f
AD
/ f
AD
8-bit / 10-bit
O
Resolution
Analog input pin
AN
0
and AN
1
(2 pins) / AN
0
to AN
3
(4 pins) / AN
0
to AN
5
(6 pins) / AN
0
to AN
7
(8 pins)
O
O
Sample & Hold
Not activated
Activated
O
(2) AN1 conversion begins after AN0
conversion is complete
A-D
conversion
start flag
“1”
“0”
A-D register 0
A-D register 1
φ
AD
A-D register i
Result
Result
Result
8-bit resolution : 28
φ
AD
cycles
10-bit resolution : 33
φ
AD
cycles
8-bit resolution : 28
φ
AD
cycles
10-bit resolution : 33
φ
AD
cycles
(3) Consecutive conversion
A-D conversion
is complete
(1) Start A-D conversion
Set to “1” by software.
Cleared to “0” by software
Note:When
φ
AD
frequency is less than 1MH
Z
, sample and hold function cannot be selected.
Conversion rate per analog input pin is 49
φ
AD
cycles for 8-bit resolution and 59
φ
AD
cycles for 10-bit resolution.
(4)