參數(shù)資料
型號： M30102M3T-XXXFP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP48
封裝： 7 X 7 MM, 0.50 MM PITCH, PLASTIC, LQFP-48
文件頁數(shù)： 71/166頁
文件大?。?/td> 2060K
代理商： M30102M3T-XXXFP
REVISION HISTORY
M30100/M30102 GROUP DATA SHEET
Rev.
Date
Description
Page
Summary
159
9
14
18
19
20
21
23
30
31
35
37
38
49
51
53(rev.C)
52
53
57
58
59-94
97
98
99
100
101
102
104
105
106
108
113
114
118
119-122
123
124
126
127
129
130
131
Explanation of memory is partly revised.
Figure 1.3.1 is partly revised.
Figure 1.5.4 is partly revised.
Figure 1.7.1 is partly revised.
Table 1.8.1 is partly revised.
Figure 1.8.3 is partly revised.
Explanation of (1) main clock is partly revised.
Explanation of (5) fc32 is partly revised.
Figure 1.8.5 is partly revised.
Figure 1.8.6 is added.
Explanation of oscillation stop detection function is partly revised.
Figure 1.10.2 is partly revised.
Figure 1.12.1 is partly revised.
Explanation of UART0 receive interrupt of (1)special interrupts is partly revised.
Explanation of CNTR0 interrupt and TCIN interrupt are added to (2)peripheral I/O
interrupts instead of CNTR0 and TCIN interrupt.
Table 1.12.1 is partly revised.
Figure 1.12.8 is partly revised.
Figure 1.12.9 is partly revised.
Explanation of INT0 input filter is partly revised.
Figure 1.12.11 is partly revised.
Explanation of UART0 Receive Hardware Input and Figure 1.12.12 are deleted.
Explanation of CNTR0 interrupt and Figure 1.12.13 are added.
Explanation of TCIN interrupt and Figure 1.12.14 are added.
Figure 1.13.1 is partly revised.
PM1 register is added to Figure 1.13.2.
Timer: Full-fledged revision
Note is added to UARTi transmit buffer register in Figure 1.15.3.
UARTi transmit/receive control register 0 of Fig 1.15.4 is partly revised.
Note of UARTi transmit/receive control register 1 of Fig 1.5.5 is partly revised.
Note 2 is added to UART transmit/receive control register 2 in Fig 1.15.5.
Table 1.15.1 Note 1 is partly revised.
Table 1.15.2 is partly revised.
Figure 1.15.7 is partly revised.
Explanation of (e) is partly revised.
Note 1 of Table 1.15.1 is partly revised.
Table 1.15.4 is partly revised.
Explanation of (b) is partly revised.
Figure 1.16.4 is partly revised.
Figure 1.16.5 is partly revised.
Figure numbers are revised.
Figures 1.18.1 to 1.18.4 are partly revised.
Figure 1.18.5 is partly revised.
Figure 1.18.6 is partly revised.
Note 1 is added to Table 1.18.1.
(2) is added to explanation of precautionary note of serial I/O.
(3) is added to explanation of precautionary note of noise.
Explanation of precautionary notes of Timers Y, Z and C are added.
Notes 2 and 3 of Table 1.19.2 are partly revised.
Note 5 of Table 1.19.2 is partly revised.
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