參數(shù)資料
型號: M2V56S20ATP-8
廠商: Mitsubishi Electric Corporation
英文描述: 256M Synchronous DRAM
中文描述: 256M同步DRAM
文件頁數(shù): 20/49頁
文件大?。?/td> 239K
代理商: M2V56S20ATP-8
Feb.2000
MITSUBISHI LSIs
MITSUBISHI ELECTRIC
SDRAM (Rev.1.1)
Single Data Rate
M2V56S20/ 30/ 40/ TP -6, -7, -8
256M Synchronous DRAM
20
[ Read Interrupted by Burst Terminate ]
Similarly to the precharge, a burst terminate command can interrupt the burst read operation and
disable the data output. The terminated bank remains active. READ to TBST interval is minimum 1
CLK. A TBST command to output disable latency is equivalent to the /CAS Latency.
CLK
Command
DQ
TBST
READ
Q0
Q1
Q2
Command
DQ
TBST
READ
Q0
Q1
Command
DQ
TBST
READ
Q0
Command
DQ
TBST
READ
Q0
Q1
Q2
Command
DQ
TBST
READ
Q0
Q1
Command
DQ
TBST
READ
Q0
CL=2
CL=3
Read interrupted by Terminate (BL=4)
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