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參數(shù)資料
| 型號： | M2V28D20ATP-75 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 128M Double Data Rate Synchronous DRAM |
| 中文描述： | 128M的雙數(shù)據(jù)速率同步DRAM |
| 文件頁數(shù)： | 22/36頁 |
| 文件大?。?/td> | 1216K |
| 代理商： | M2V28D20ATP-75 |
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22
MITSUBISHI ELECTRIC
Jun,'00
Preliminary
MITSUBISHI LSIs
DDR SDRAM (Rev.0.1)
M2S28D20/ 30/ 40ATP
128M Double Data Rate Synchronous DRAM
The DDR SDRAM has four independent banks. Each bank is activated by the ACT command with
the bank addresses (BA0,1). A row is indicated by the row address A11-0. The minimum activation
interval between one bank and the other bank is tRRD. Maximum 2 ACT commands are allowed
within tRC,although the number of banks which are active concurrently is not limited.
BANK ACTIVATE
OPERATIONAL DESCRIPTION
The PRE command deactivates the bank indicated by BA0,1. When multiple banks are active, the
precharge all command (PREA,PRE+A10=H) is available to deactivate them at the same time. After
tRP from the precharge, an ACT command to the same bank can be issued.
PRECHARGE
Bank Activation and Precharge All (BL=8, CL=2)
A precharge command can be issued at BL/2 from a read command without data loss.
Precharge all
Command
A0-9,11
A10
BA0,1
DQ
ACT
Xa
Xa
00
READ
Y
0
00
ACT
Xb
Xb
01
PRE
tRRD
tRCD
1
ACT
Xb
Xb
01
tRAS
tRP
tRCmin
2 ACT command / tRCmin
DQS
Qa0
BL/2
Qa1
Qa2
Qa3
Qa4
Qa5
Qa6
Qa7
/CLK
CLK
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M2V28D30ATP-10 | 353620600 |
| M2V28D30ATP-75 | 128M Double Data Rate Synchronous DRAM |
| M2V28D40ATP-10 | 128M Double Data Rate Synchronous DRAM |
| M2V28D40ATP-75 | 128M Double Data Rate Synchronous DRAM |
| M2S28D20ATP | 128M Double Data Rate Synchronous DRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M2V28D30ATP-10 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:128M Double Data Rate Synchronous DRAM |
| M2V28D30ATP-75 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:128M Double Data Rate Synchronous DRAM |
| M2V28D40ATP-10 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:128M Double Data Rate Synchronous DRAM |
| M2V28D40ATP-75 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:128M Double Data Rate Synchronous DRAM |
| M2V28S20ATP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:128M Synchronous DRAM |
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