參數(shù)資料
型號(hào)： M2S56D30AKT-75L
廠商： Mitsubishi Electric Corporation
英文描述： 256M Double Data Rate Synchronous DRAM
中文描述： 256M雙數(shù)據(jù)速率同步DRAM
文件頁(yè)數(shù)： 26/40頁(yè)
文件大?。?/td> 768K
代理商： M2S56D30AKT-75L
26
MITSUBISHI ELECTRIC
Mar. '02
MITSUBISHI LSIs
DDR SDRAM
(Rev.1.44)
M2S56D20/ 30/ 40ATP -75AL, -75A, -75L, -75, -10L, -10
M2S56D20/ 30/ 40AKT -75AL, -75A, -75L, -75, -10L, -10
256M Double Data Rate Synchronous DRAM
After tRCD from the bank activation, a READ command can be issued. 1st Output data is available after the
/CAS Latency from the READ, followed by (BL-1) consecutive data. (BL : Burst Length) The start address is
specified by A11,A9-A0(x4)/A9-A0(x8)/A8-A0(x16), and the address sequence of burst data is defined by the
Burst Type. A READ command may be issued to any active bank, so the row precharge time (tRP) can be
hidden during the continuous burst data by interleaving the multiple banks. When A10 is high in READ
command, the auto-precharge (READA) is performed. Any command (READ,WRITE,PRE,ACT) asserted to
the same bank is inhibited till the internal precharge is completed. The internal precharge operation starts at
BL/2 time after READA command. The next ACT command can be issued after (BL/2+tRP) time from the
previous READA.
READ
Multi Bank Interleaving READ (BL=8, CL=2)
/CLK
CLK
Command
A0-9,11
A10
BA0,1
DQ
ACT
Xa
Xa
00
READ
Y
0
00
READ
Y
0
10
ACT
Xb
Xb
10
PRE
0
00
tRCD
/CAS latency
Burst Length
DQS
Qa0
Qa1
Qa2
Qa3
Qa4
Qa5
Qa6
Qa7
Qb0
Qb1
Qb2
Qb3
Qb4
Qb5
Qb7
Qb8
相關(guān)PDF資料
PDF描述
M2S56D30ATP 256M Double Data Rate Synchronous DRAM
M2S56D40ATP-75A 256M Double Data Rate Synchronous DRAM
M2S56D40ATP-75AL 256M Double Data Rate Synchronous DRAM
M2S56D40ATP-75L 256M Double Data Rate Synchronous DRAM
M2S56D40ATP75A 256M Double Data Rate Synchronous DRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M2S56D30ATP 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM
M2S56D30ATP-10 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM
M2S56D30ATP-10L 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM
M2S56D30ATP-75 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM
M2S56D30ATP75A 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*