- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄224123 > M25P32VMP6TP (意法半導(dǎo)體) 4 Mbit Uniform Sector, Serial Flash Memory PDF資料下載
參數(shù)資料
| 型號(hào)： | M25P32VMP6TP |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | FLASH |
| 英文描述： | 4 Mbit Uniform Sector, Serial Flash Memory |
| 中文描述： | 4兆位統(tǒng)一部門，串行閃存 |
| 文件頁數(shù)： | 39/39頁 |
| 文件大?。?/td> | 506K |
| 代理商： | M25P32VMP6TP |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁當(dāng)前第39頁
9/39
M25P32
Protection Modes
The environments where non-volatile memory de-
vices are used can be very noisy. No SPI device
can operate correctly in the presence of excessive
noise. To help combat this, the M25P32 features
the following data protection mechanisms:
■
Power On Reset and an internal timer (tPUW)
can provide protection against inadvertant
changes while the power supply is outside the
operating specification.
■
Program, Erase and Write Status Register
instructions are checked that they consist of a
number of clock pulses that is a multiple of
eight, before they are accepted for execution.
■
All instructions that modify data must be
preceded by a Write Enable (WREN)
instruction to set the Write Enable Latch
(WEL) bit. This bit is returned to its reset state
by the following events:
–
Power-up
–
Write Disable (WRDI) instruction
completion
–
Write Status Register (WRSR) instruction
completion
–
Page Program (PP) instruction completion
–
Sector Erase (SE) instruction completion
–
Bulk Erase (BE) instruction completion
■
The Block Protect (BP2, BP1, BP0) bits allow
part of the memory to be configured as read-
only. This is the Software Protected Mode
(SPM).
■
The Write Protect (W) signal allows the Block
Protect (BP2, BP1, BP0) bits and Status
Register Write Disable (SRWD) bit to be
protected. This is the Hardware Protected
Mode (HPM).
■
In addition to the low power consumption
feature, the Deep Power-down mode offers
extra software protection from inadvertant
Write, Program and Erase instructions, as all
instructions are ignored except one particular
instruction (the Release from Deep Power-
down instruction).
Table 2. Protected Area Sizes
Note: 1. The device is ready to accept a Bulk Erase instruction if, and only if, all Block Protect (BP2, BP1, BP0) are 0.
Status Register
Content
Memory Content
BP2
Bit
BP1
Bit
BP0
Bit
Protected Area
Unprotected Area
0
none
All sectors1 (64 sectors: 0 to 63)
0
1
Upper 64th (Sector 63)
Lower 63/64ths (63 sectors: 0 to 62)
0
1
0
Upper 32nd (two sectors: 62 and 63)
Lower 31/32nds (62 sectors: 0 to 61)
0
1
Upper sixteenth (four sectors: 60 to 63)
Lower 15/16ths (60 sectors: 0 to 59)
1
0
Upper eighth (eight sectors: 56 to 63)
Lower seven-eighths (56 sectors: 0 to 55)
1
0
1
Upper quarter (sixteen sectors: 48 to 63)
Lower three-quarters (48 sectors: 0 to 47)
1
0
Upper half (thirty-two sectors: 32 to 63)
Lower half (32 sectors: 0 to 31)
1
All sectors (64 sectors: 0 to 63)
none
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M25P40SVMN6P/4 | 512K X 8 SPI BUS SERIAL EEPROM, PDSO8 |
| M25P40SVMN3G/4A | 512K X 8 SPI BUS SERIAL EEPROM, PDSO8 |
| M25P40-VMN6TG/X | 512K X 8 SPI BUS SERIAL EEPROM, PDSO8 |
| M25P40VMF6 | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25P40VMF6G | 4 Mbit Uniform Sector, Serial Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M25P32-VMP6TP | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:32-Mbit, low voltage, serial Flash memory with 75 MHz SPI bus interface |
| M25P32-VMS6G | 制造商:Micron Technology Inc 功能描述:SERIAL NOR - Trays |
| M25P32-VMS6TG | 制造商:Micron Technology Inc 功能描述:SERIAL NOR - Tape and Reel |
| M25P32-VMW3GB | 制造商:Micron Technology Inc 功能描述:SERIAL NOR - Trays |
| M25P32-VMW3TGB | 制造商:Micron Technology Inc 功能描述:NOR Flash Serial-SPI 3.3V 32Mbit 4M x 8bit 8ns 8-Pin SO W T/R |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。