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Fusion Family of Mixed Signal FPGAs
Revision 4
2-49
Erase Page Operation
The Erase Page operation is initiated when the ERASEPAGE pin is asserted. The Erase Page operation
allows the user to erase (set user data to zero) any page within the FB.
The use of the OVERWRITEPAGE and PAGELOSSPROTECT pins is the same for erase as for a
Program Page operation.
As with the Program Page operation, a STATUS of '01' indicates that the addressed page is not erased.
A waveform for an Erase Page operation is shown in Figure 2-37.
Erase errors include the following:
1. Attempting to erase a page that is Overwrite Protected (STATUS = '01')
2. Attempting to erase a page that is not in the Page Buffer when the Page Buffer has entered Page
Loss Protection mode (STATUS = '01')
3. The Write Count of the erased page exceeding the Write Threshold defined in the part
specification (STATUS = '11')
4. The ECC Logic determining that there is an uncorrectable error within the erased page (STATUS
= '10')
Figure 2-37 FB Erase Page Waveform
CLK
ERASE
ADDR[17:0]
OVERWRITEPROTECT
PAGELOSSPROTECT
BUSY
STATUS[1:0]
Page
Valid
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
RSC49DRAN-S734 CONN EDGECARD 98POS .100 R/A PCB
AFS1500-1FGG484I IC FPGA 8MB FLASH 1.5M 484-FBGA
RMC49DRAN-S734 CONN EDGECARD 98POS .100 R/A PCB
170-050-271L030 CONN DB50 CRIMP FEM YLW CHROME
RSC49DRAH-S734 CONN EDGECARD 98POS .100 R/A PCB
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