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ProASIC3E DC and Switching Characteristics
2-24
Revision 13
Single-Ended I/O Characteristics
3.3 V LVTTL / 3.3 V LVCMOS
Low-Voltage Transistor鈥揟ransistor Logic is a general-purpose standard (EIA/JESD) for 3.3 V
applications. It uses an LVTTL input buffer and push-pull output buffer. The 3.3 V LVCMOS standard is
supported as part of the 3.3 V LVTTL support.
Table 2-25 Minimum and Maximum DC Input and Output Levels
3.3 V LVTTL /
3.3 V LVCMOS
VIL
VIH
VOL
VOH IOL IOH
IOSL
IOSH
IIL1 IIH2
Drive Strength
Min.
V
Max.
V
Min.,
V
Max.
V
Max.
V
Min.
VmA mA
Max.
mA3
Max.
mA3
A4 A4
4 mA
鈥�0.3
0.8
2
3.6
0.4
2.4
4
27
25
10 10
8 mA
鈥�0.3
0.8
2
3.6
0.4
2.4
8
54
51
10 10
12 mA
鈥�0.3
0.8
2
3.6
0.4
2.4
12 12
109
103
10 10
16 mA
鈥�0.3
0.8
2
3.6
0.4
2.4
16 16
127
132
10 10
24 mA
鈥�0.3
0.8
2
3.6
0.4
2.4
24 24
181
268
10 10
Notes:
1. IIL is the input leakage current per I/O pin over recommended operation conditions where 鈥�0.3 V< VIN < VIL.
2. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN< VCCI. Input current is
larger when operating outside recommended ranges.
3. Currents are measured at high temperature (100掳C junction temperature) and maximum voltage.
4. Currents are measured at 85掳C junction temperature.
5. Software default selection highlighted in gray.
Figure 2-6 AC Loading
Table 2-26 3.3 V LVTTL / 3.3 V LVCMOS AC Waveforms, Measuring Points, and Capacitive Loads
Input Low (V)
Input High (V)
Measuring Point* (V)
VREF (typ.) (V)
CLOAD (pF)
0
3.3
1.4
鈥�
35
Note: *Measuring point = Vtrip. See Table 2-15 on page 2-18 for a complete table of trip points.
Test Point
Enable Path
Datapath
35 pF
R = 1 k
R to VCCI for tLZ / tZL / tZLS
R to GND for tHZ / tZH / tZHS
35 pF for tZH / tZHS / tZL / tZLS
35 pF for tHZ / tLZ
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
ASC43DRYS CONN EDGECARD 86POS .100 DIP SLD
ACB90DHNN CONN EDGECARD 180PS .050 DIP SLD
ABB90DHNN CONN EDGECARD 180PS .050 DIP SLD
ACB90DHND CONN EDGECARD 180PS .050 DIP SLD
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