參數(shù)資料
型號: LX8819-25CDT
廠商: MICROSEMI CORP
元件分類: Fixed/Adjustable Positive Multiple Output LDO Regulator
英文描述: DUAL OUTPUT, FIXED/ADJUSTABLE POSITIVE LDO REGULATOR, PSSO5
封裝: PLASTIC, TO-252, D-PAK, 5-PIN
文件頁數(shù): 2/9頁
文件大小: 305K
代理商: LX8819-25CDT
LX8819
DATA SHEET
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 2
WWW
.Microse
m
i
.CO
M
Dual Channel 1A Low Dropout Regulator
Copyright
2003
Revision 1.0a, 4/29/2005
TM
ABSOLUTE MAXI MUM RATI NGS
Input Voltage (VIN)......................................................................................13.5V
Load Current (Internally Limited) .....................................................................1A
Power Dissipation ......................................................................Internally Limited
Short-Circuit Protection .......................................................................... Indefinite
Operating Temperature Range ......................................................... 0
°C to 150°C
Maximum Operating Junction Temperature ................................................ 150
°C
Storage Temperature Range...........................................................-65
°C to 150°C
Lead Temperature (Soldering 180 seconds) ................................................ 235
°C
RoHS Peak Package Solder Reflow Temperature
(40 second maximum exposure) ..................................................... 260°C (+0, -5)
Note: Exceeding these ratings could cause damage to the device. All voltages are with respect to
Ground. Currents are positive into, negative out of specified terminal
.
TH ERM A L DATA
DF Plastic S-PAK 5-Pin
THERMAL RESISTANCE
-JUNCTION TO CASE,
θJC
5
°C/W
THERMAL RESISTANCE
-JUNCTION TO AMBIENT,
θJA
30
°C/W
DT Plastic D-PAK 5-Pin
THERMAL RESISTANCE
-JUNCTION TO CASE,
θJC
6
°C/W
THERMAL RESISTANCE
-JUNCTION TO AMBIENT,
θJA
32
°C/W
Junction Temperature Calculation: TJ = TA + (PD x
θJA).
The
θJA numbers are guidelines for the thermal performance of the device/pc-board system. All of the
above assume no ambient airflow.
θJA can vary from 25°C/W to > 40°C/W depending on mounting technique. (See Application Notes
Section: Thermal considerations)
PACKAGE PI N OUT
DF PACKAGE
(Top View)
RoHS 100% Matte Tin Lead Finish
TAB is GND
VOUT2
GND
ADJ
VIN
VOUT1
DT PACKAGE
(Top View)
FUNCTIONAL PIN DESCRIPTION
Name
Description
VIN
Positive unregulated supply input for the regulator – Bypass to GND with at least 2.2F capacitance having low
ESR for good transient response.
ADJ
Adjustable regulator feedback input – The output voltage can be set by two external resistors with the following
relationship:
1
ADJ
2
1
REF
R
I
R
1
V
VOUT1
+
=
where R1 is the resistor connected between VOUT1 and ADJ, and R2 is the resistor connected between ADJ and
GND.
GND
Common terminal for ground reference – The input and output bypass capacitors should be connected to
this pin. In addition the tab on the S-Pak package and pin 3 are also used for heat sinking the device.
VOUT1
Adjustable regulator output (Regulator #1) – It is recommended to bypass to GND with at least 2.2F. Size your
output capacitor to meet the transient loading requirement. If you have a very dynamic load, a lower ESR
capacitor will improve the response to these load steps.
VOUT2
Fixed regulator output (Regulator #2) – It is recommended to bypass to GND with at least 2.2F. Size your
output capacitor to meet the transient loading requirement. For dynamic loads, a lower ESR capacitor will
improve the response to these load steps.
PP
AA
CC
KK
AA
GG
EE
DD
AA
TT
AA
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