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參數(shù)資料
| 型號： | LX1910-CDUT |
| 廠商： | MICROSEMI CORP-ANALOG MIXED SIGNAL GROUP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 0.8 A SWITCHING REGULATOR, 1325 kHz SWITCHING FREQ-MAX, PDSO8 |
| 封裝： | PLASTIC, MSOP-8 |
| 文件頁數(shù)： | 10/12頁 |
| 文件大?。?/td> | 602K |
| 代理商： | LX1910-CDUT |
LX1910
PRELIMINARY DATA SHEET
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 7
WWW
.Microse
m
i
.CO
M
High Frequency Step Down Regulator
I N T E GR A T ED
PRODUCT S
Copyright
2000
Rev. 0.9a, 2004-04-16
APPLICATION NOTE
+
=
2
1
FBT
OUT
R
1
V
eq. 5
where VFBT is the Feedback Threshold Voltage.
A good starting value for R2 is anywhere from 50k to
100k
. Selecting R2 yields an R1 value for any given
output voltage of:
=
1
V
R
FBT
OUT
2
1
eq. 6
COMPENSATION
The LX1910 is a voltage-mode PWM controller and
therefore has a complex pole due to the inductor and output
capacitance that requires compensation for stable operation.
This complex pole is at a frequency of:
O
1
P
C
L
2
1
F
π
=
eq. 7
Normally a compensating zero is formed with the output
capacitor’s capacitance and ESR, but if low ESR ceramic
capacitors are used then the zero caused is usually much
larger than the desired zero cross over frequency. As a
result, a zero must be entered into the feedback loop in
order to maintain stability.
The LX1910 compensation scheme is shown in Figure 5.
V
OUT
LX1910
FB
SW
COMP
C
R
C
F
R
1
R
2
C
O
L
1
R
F
Figure 5 –
Compensation
The compensation circuitry comprises of the feed-forward
resistor (RF) and capacitor (CF) and the COMP pin resistor
(RC) and capacitor (CC). This circuit compensates the
LX1910’s feedback such that it will be unconditionally
stable regardless of output capacitor value or ESR. This
allows for a wide variety of output filtering schemes.
To begin choosing the values for compensation, the
Thevenin equivalent of R1 in parallel with R2 must be
calculated using the following equation.
2
1
2
1
TH
R
+
=
eq. 7
RC is then chosen such that it is approximately ten times
the calculate RTH value.
+
=
2
1
2
1
C
R
10
R
eq. 8
There are two zeros shown in the compensation scheme:
the first set by the RC/CC combination and the second set
by the RTH/CF combination given by the following
equations:
C
1
Z
C
R
2
1
F
π
=
eq. 9
F
TH
2
Z
C
R
2
1
F
π
=
eq. 10
Since the maximum phase contribution takes place over
a decade of frequency, the first zero is set to be one-tenth
that of the complex pole frequency (eq. 7) set by the output
inductor and capacitor.
1
P
1
Z
F
10
1
F
=
yielding
O
C
L
2
1
10
1
C
R
2
1
π
=
π
Solving for the COMP capacitor (CC) yields.
C
O
C
R
C
L
10
C
=
eq. 11
Next, the second zero (FZ2) is calculated using equation
10 and setting the zero frequency at two octaves or four
times that of the complex pole (eq. 7). This second zero
acts as an output capacitance ESR emulator. Setting both
zero’s frequency for maximum phase shift would result in
too much gain.
1
P
2
Z
F
4
F
=
yielding
AA
PP
LL
IICC
AA
TT
IIOO
NN
SS
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