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參數(shù)資料
| 型號： | LX1676CLQ-TR |
| 廠商： | MICROSEMI CORP-ANALOG MIXED SIGNAL GROUP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 1.5 A SWITCHING CONTROLLER, 1100 kHz SWITCHING FREQ-MAX, PQCC38 |
| 封裝： | 7 X 5 MM, ROHS COMPLIANT, PLASTIC, MLPQ-38 |
| 文件頁數(shù)： | 2/16頁 |
| 文件大?。?/td> | 0K |
| 代理商： | LX1676CLQ-TR |
LX1676
PRODUCTION DATA SHEET
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 10
WWW
.Microse
m
i
.CO
M
Mobile AMD Athlon
VRM Controller
Copyright
2000
Revision: 1.0, 4/12/2005
TM
TH EORY OF O PERATION (CONTINUED)
OVER-CURRENT PROTECTION (PHASE 3)
The hysteretic phase has its own current limit protection
because with it’s very fast response time with a 100 nH
inductor the upper MOSFET cannot be allowed to stay on
during an output short circuit condition. The phase 3 over-
current sensing uses the RDS(ON) of the upper MOSFET
with a resistor RSET to determine the over current limit
point. A current source draws 50uA through RSET which
determines the required drop across the MOSFET
RDS(ON) to initiate a current limit condition.
50 uA
+
_
RSET
Q2
+
_
Current Limit
Comparator
Q1
Vin
RDS(ON)
Vout
400nS Delay
ILIM3
VS3
Figure 4 – Phase 3 Current Limit
Phase 3 RSET is calculated by:
uA
50
RDSon
ILimit
Rset
=
OVER VOLTAGE PROTECTION
An over voltage protection circuit monitors the output
voltage and will latch all three phases off if an over voltage
condition (greater than 2.35 V) is detected.
Both
MOSFETs for phase 3 will be held off and the lower
MOSFETs for phase 1 and 2 will be held on to discharge
the output capacitor till the output voltage drops below .85
volt, at .85 volts all MOSFETs will be turned off.
FAULT LOGIC
There are a number of possible states that will cause a
fault condition that will disable the output MOSFET
drivers. A fault condition will be caused by the following:
Enable (ENA) pin being pulled low
Over-current condition on either phase 1 or phase 3
Over Voltage output > 2.35V
Under Voltage output < 0.85V
In all cases except Over Voltage all MOSFET drivers
will be latched off. For an Over Voltage fault the lower
MOSFETs for phase 1 and 2 will be held on to discharge
the bulk capacitance on the output till a lower limit of .85
volts is reached then all MOSFETS will be turned off.
To reset a fault it necessary to cycle the ENA pin low
then back high or remove and reapply the input voltage
VIN.
The Under Voltage monitor is not enabled until the
output voltage has ramped up to the level commanded by
the DACOUT pin and the PWGD output in high.
PWM FREQUENCY
An external resistor sets the PWM frequency from the
ROSC pin to ground.
The equation for ROSC is:
()
9
e
100
f
K
1
ROSC
+
=
where ROSC is in K, f is in Hz, K=105e-12
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PP
LL
IICC
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TT
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