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參數(shù)資料
| 型號： | LV25700PM |
| 元件分類： | 調(diào)諧器 |
| 英文描述： | AUDIO TUNER, PQFP80 |
| 封裝： | 20 X 14 MM, QIP-80 |
| 文件頁數(shù)： | 12/22頁 |
| 文件大?。?/td> | 746K |
| 代理商： | LV25700PM |
LV25700PM
No.A1709-2/68
Continued from preceding page.
Auto alignment EEPROM not necessary. It is incorporated inside the IC
FM RF, VCO, Null-voltage, Mute-on, Mute-ATT, SNC, HCC, Separation, S-meter, AM/FM AGC sensitivity,
AM/FM IF gain, SD sensitivity, I
2C bus compatible
* This IC can be supplied in the adjusted state. Some adjustments are necessary depending on the specifications and
external components.
Other functions
Neighboring interference (Quality Out) RDS AF-search support
I
2C communication bus
Specifications
Absolute Maximum Ratings at Ta = 25
°C, GND = 0V
Parameter
Symbol
Conditions
Ratings
Unit
VCC_H max
8.7
V
VCC_L max
5.7
V
VDD max
6.5
V
Maximum supply voltage
VDDBUS max
6.5
V
Maximum input current
VIN max
6.5
V
Maximum output current
VO max
6.5
V
Allowable power dissipation
Pd max
(Ta
≤ 85°C)
1040
mW
Operating temperature
Topr
-40 to +85
°C
Storage temperature
Tstg
-40 to +150
°C
Recommended Operating Conditions at Ta = 25
°C, GND = 0V
Parameter
Symbol
Conditions
Ratings
Unit
VCC_H
PIN 1, 2, 15, 68, 80
8.0
V
VCC_L
PIN 53, 74
5.0
V
VDD
PIN 35
5.0
V
Recommended supply voltage
VDDBUS
PIN 34
5.0
V
Recommended Operating Conditions at Ta = 25
°C, GND = 0V
Ratings
Parameter
Symbol
Conditions
min
typ
max
Unit
VDD
PIN 35
4.5
5.0
5.5
V
VDDBUS
PIN 34 (*1)
3.0
5.0
5.5
V
VCOP_H
PIN 1, 2, 15, 68, 80
7.5
8.0
8.5
V
Operating supply voltage range
VCOP_L
PIN 53, 74
4.5
5.0
5.5
V
Logic operation, memory hold
voltage range
VDDLOGIC
PIN 35
3.5
5.5
V
Internal supply
VREG
PIN 36 VDDLOGIC > 3.5V (*2)
3.0
V
Input High level voltage
VIH
PIN 31, 32, 33
0.8VDDBUS
VDDBUS
V
Input Low level voltage
VIL
PIN 31, 32, 33
0
0.2VDDBUS
V
Input amplitude voltage
VIN
PIN 39
0.5
1.5
Vrms
Input frequencies
FIN
PIN 39
20.5
MHz
IIH (1)
PIN 39, VI = VDD = 5.0V
2.0
5.0
15.0
μA
Input High level current
IIH (2)
PIN 31, 32, 33
VI = VDD = VDDBUS = 5.0V
3.0
μA
IIL (1)
PIN 39, VI = VDD = VSS
2.0
5.0
15.0
μA
Input Low level voltage
IIL (2)
VI = VSS
3.0
μA
Hysteresis width
VH
PIN 31, 32, 33
0.1VDDBUS
0.2VDDBUS
V
VOH (1)
PIN 26, 27, 28, 29, 30
IO = -1mA, VDD = VDDBUS
VDD-1.0
V
VOH (2)
PIN 38
IO = -200μA, VDD = VDDBUS
VREG-1.0
V
Output High level voltage
VOH (3)
PIN 21, 22
IO = -500μA, VDD = VDDBUS
VDD-1.0
V
Continued on next page.
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