
LV25450PNW
No.A1668-38/40
(2) Dead zone mode characteristics and selection criteria
This section describes the characteristics of each dead zone mode and the criteria for selecting that mode.
(1) DZA mode
In DZA mode, the correction signal is output from the charge pump even if the reference frequency (fr) and
comparison frequency (fp) match. This results in excellent signal-to-noise ratio characteristics. However, due to
the generation of reference frequency component sidebands, beating may occur in the presence of a strong input
signal. This is because the PLL loop responds sensitively to leakage components from the RF stage through the
mixer and this modulates the VCO.
(2) DZB mode
Like DZA mode, in DZB mode the correction signal is output from the charge pump even if the reference
frequency (fr) and comparison frequency (fp) match. However, the correction signal voltage is lower in DZB
mode than in DZA mode. The feature of this mode is that it provides a better signal-to-noise ratio than DZC or
DZD mode yet is less susceptible to beating than DZA mode.
(3) DZC mode
In DZC mode, a correction signal proportional to the phase difference between the reference frequency (fr) and
comparison frequency (fp) is output from the charge pump. A small amount of noise may occur when the phase
difference is close to 0 ns. Since the signal-to-noise ratio may degrade significantly at low temperatures (under
-30°C), this mode should not be used.
(4) DZD mode
In DZD mode, a correction signal proportional to the phase difference between the reference frequency (fr) and
comparison frequency (fp) is output from the charge pump. The correction signal is not output when the phase
difference is in the vicinity of ± <a few ns>. As a result the signal-to-noise ratio is worse than the other modes, but
the occurrence of beating is suppressed.
Power supply turning on/cutting timing and power-on reset
Recommended operating conditions/Ta=25
°C, GND=0V
Ratings
Parameter
Symbol
Conditions
min
typ
max
Unit
Vcop_H
PIN 3,27,35,54,55,61
7.5
8.5
V
Operation power-supply voltage
Vcop_L
PIN 16,25,41
4.5
5.5
V
VREG3
PIN 26
2.7
3.3
V
Internal logic voltage
VREG4
PIN 15
3.7
4.3
V
Power supply turning on time(8.0V → 5.0V)
T7
10
100
ms
Vhmin3
PIN 26 *1
VREG3
2.2
V
Internal register maintenance voltage
Vhmin4
PIN 15 *1
VREG4
2.2
V
Internal register reset voltage
Voff
PIN 16,25,41 *1
0
0.2
V
Internal register reset power supply start-up time
tPOR
PIN 16,25,41 *1
0.05
3
ms
Power supply turning on time(5.0V → 8.0V)
T14
10
100
ms
*1: Design reference value