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參數(shù)資料
| 型號： | LV24100LP |
| 元件分類： | 調(diào)諧器 |
| 英文描述： | 2-BAND, AUDIO TUNER, QCC40 |
| 封裝： | 5 X 5 MM, VQLP-40 |
| 文件頁數(shù)： | 2/7頁 |
| 文件大?。?/td> | 194K |
| 代理商： | LV24100LP |
LV24100LP
No.A0194-2/18
Specifications
Maximum Ratings at Ta = 25
°C
Parameter
Symbol
Conditions
Ratings
Unit
VCC max
Analog block supply voltage
5.0
V
Maximum supply voltage
VDD max
Digital block supply voltage
4.5
V
VIN1 max
Clock, Data, NR_W
VDD+0.3
V
Digital input voltage
VIN2 max
External_clk_in
VDD+0.3
V
Allowable power dissipation
Pd max
Ta
≤70°C, Mounted on a specified board *
140
mW
Operating temperature
Topr
-20 to +70
°C
Storage temperature
Tstg
-40 to +125
°C
Note: Mounted on a specified board: 40mm
×50mm×0.8mm, glass epoxy
Operating Condition at Ta = 25
°C
Parameter
Symbol
Conditions
Ratings
Unit
VCC
Analog block supply voltage
3.0
V
Recommended supply voltage
VDD
Digital block supply voltage
3.0
V
VCC op
3.0 to 4.8
V
VDD op
3.0 to 4.0
V
Operating supply voltage range
VIO op
Interface voltage
1.8 to 4.0
V
Note: The VIO application voltage must be either equivalent to VDD or the VDD value or less. (VIO ≤ VDD)
Interface Block Allowable Operation Range at Ta = -20 to +70
°C, VIO = 3.0V, VSS = 0V
Ratings
Parameter
Symbol
Conditions
min
typ
max
Unit
Supply voltage
VDD
2.5
4.0
V
VIH
High level input voltage range
0.7VDD
VDD
V
Digital block input
VIL
Low level input voltage range
0
0.6
V
IOL
Output current at Low level
2.0
mA
Digital block output
VOL
Output voltage at Low level IOL=2mA
0.6
V
Clock input operating frequency
fclk
(Pin29) clock frequency for 3wire_bus
0.7
MHz
External clock operating frequency
fclk_ext
(Pin31) clock frequency for external input
32k
14M
Hz
External clock operating voltage
Vclk_ext
(Pin31) clock voltage for external input
0.7VDD
VDD
V
Note: External clock input (pin31) allows also input of the sine wave signal. Frequency deviation is need 250ppm.
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