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參數(shù)資料
| 型號： | LUCL9313GP-DT |
| 英文描述： | Line Interface and Line Access Circuit Full-Feature SLIC and Ringing for TR-57 Applications |
| 中文描述： | 線路接口和線路接入電路全功能SLIC和敲響訓(xùn)練班- 57應(yīng)用 |
| 文件頁數(shù)： | 8/40頁 |
| 文件大?。?/td> | 746K |
| 代理商： | LUCL9313GP-DT |
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Data Sheet
September 2001
Full-Feature SLIC and Ringing Relay for TR-57 Applications
L9313 Line Interface and Line Access Circuit
8
Agere Systems Inc.
Pin Information
12-3522g (F)
Figure 2. 44-Pin PLCC
Table 1. Pin Descriptions
Pin
1
Symbol
LCTH
Type
I
Name/Function
Loop Closure Program Input.
Connect a voltage source to this point to program
the loop closure threshold. Voltage source may be external and must be connected
through a resistor, or derived via a resistor divider from V
REF
. A programmable
external voltage source may be used to provide software control of the loop closure
threshold.
SLIC Internal Reference Voltage.
Output of internal 2.35 V SLIC reference volt-
age.
Overhead Voltage Program Input.
Connect a voltage source to this point to pro-
gram the overhead voltage. Voltage source may be external or derived via a resistor
divider from V
REF
. A programmable external voltage source may be used to provide
software control of the overhead voltage. If a resistor or voltage source is not con-
nected, the overhead voltage will default to approximately 5.5 V (sufficient to pass
3.14 dBm in to 900
). If the default overhead is desired, connect this pin to ground.
Current-Limit Program Input.
Connect a voltage source to this point to program
the dc current limit. Voltage source may be external or derived via a resistor divider
from V
REF
. A programmable external voltage source may be used to provide soft-
ware control of the loop closure threshold.
Filter Capacitor.
Connect a capacitor from this node for filtering.
Filter Capacitor.
Connect a capacitor from this node to OVH to control the rate of
change of the overhead voltage. If controlled overhead is not desired, leave this
node open.
Polarity Reversal Slowdown Capacitor.
Connect a capacitor from this node to
ground to control the rate of battery reversal. If controlled battery reversal is not
desired, leave pin is open.
2
V
REF
O
3
OVH
I
4
V
PROG
I
5
6
CF2
CF1
—
—
7
FB2
—
7
9
10
11
12
13
14
15
16
17
8
6
4
3
2
1 44 43 42 41 40
5
18
20 21 22 23 24 25 26 27 28
19
39
37
36
35
34
33
32
31
30
29
38
L9313AP
FB2
LCF
RPWR
V
BAT1
V
BAT1
BGND
TIE B
′
TIE A
′
NC
FB1
BGND
C
V
P
O
V
R
L
V
C
A
R
R
V
C
TXI
ITR
ICM
RGDET
DGND
V
DD
LATCH
RESET
B0
NC
VTX
N
R
R
P
P
T
N
D
B
B
R
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