參數(shù)資料
型號: LTC6605IDJC-7#PBF
廠商: Linear Technology
文件頁數(shù): 3/20頁
文件大小: 0K
描述: IC FILTER 7MHZ DUAL 22-DFN
標準包裝: 61
濾波器類型: 抗混迭
頻率 - 截止或中心: 5MHz
濾波器數(shù): 2
濾波器階數(shù): 2nd
電源電壓: 2.7 V ~ 5.25 V
安裝類型: 表面貼裝
封裝/外殼: 22-WFDFN 裸露焊盤
供應商設備封裝: 22-DFN(6x3)裸露焊盤
包裝: 管件
LTC6605-7
11
66057f
APPLICATIONS INFORMATION
Setting the passband gain (GAIN = R2/R1) only requires
choosing a value for R1, since R2 is a xed internal 400Ω.
Therefore, the following three gains can be easily congured
without external components:
Table 1. Conguring the Passband Gain Without External
Components
GAIN
(V/V)
GAIN (dB)
R1 (Ω)
INPUT PINS TO USE
1
0
400
Drive the 400Ω Resistors. Tie
the 100Ω Resistors Together.
4
12
100
Drive the 100Ω Resistors.
5
14
80
Drive the 400Ω and 100Ω
Resistors in Parallel.
The resonant frequency, fO, is independent of R1, and
therefore independent of the gain. For any LTC6605-7 lter
conguration that conforms to Figure 3, the fO is xed at
7.98MHz. The f–3dB frequency depends on the combina-
tion of fO and Q. For any specic gain, Q is adjusted by
the selection of R4.
Setting the f–3dB Frequency
Using an external resistor (REXT), the f–3dB frequency is ad-
justable in the range of 6.5MHz to 10.0MHz (see Figure 3).
The minimum f–3dB is set for REXT equal to 0Ω and the
maximum f–3dB is arbitrarily set for a maximum passband
gain less than 1dB.
Table 2. REXT Selection GAIN = 1,
R1 = 400Ω, R4A = R4B = 100Ω
f–3dB (MHz)
REXT Ω
6.5
0
712.7
7.5
24.9
839.2
8.5
54.9
973.2
9.5
95.3
10
124
Figure 4 shows three filter configurations with an
f–3dB = 6.5MHz, without any external components. These
lters have a Q = 0.59, which is an almost ideal Bessel
characteristic with linear phase.
Figure 5 shows three lter congurations that use some
external resistors, and are tailored for a very at ±0.4dB
6.7MHz passband.
Many other congurations are possible by using the equa-
tions in Figure 3. For example, external resistors can be
added to modify the value of R1 to congure GAIN ≠ 1. For
an even more exible lter IC with similar performance,
consider the LTC6601.
BIAS Pin
Each channel of the LTC6605-7 has a BIAS pin whose
function is to tailor both performance and power. The BIAS
pin can be modeled as a voltage source whose potential
is 1.15V above the Vsupply and that has a Thevenin
equivalent resistance of 150k. This three-state pin has xed
logic levels relative to V(see the Electrical Characteristics
table), and can be driven by any external source that can
drive the BIAS pin’s equivalent input impedance.
If the BIAS pin is tied to the positive supply, the part is
in a fully active state congured for highest performance
(lowest noise and lowest distortion).
If the BIAS pin is oated (left unconnected), the part is in
a fully active state, but with amplier currents reduced and
performance scaled back to preserve power consumption.
Care should be taken to limit external leakage currents
to this pin to under 1μA to avoid putting the part in an
unexpected state.
If the BIAS pin is tied to the most negative supply (V),
the part is in a low power shutdown mode with amplier
outputs disabled. In shutdown, all internal biasing current
sources are shut off, and the output pins each appear as
open collectors with a non-linear capacitor in parallel and
steering diodes to either supply. Because of the non-linear
capacitance, the outputs can still sink and source small
amounts of transient current if exposed to signicant
voltage transients. Using this function to wire-OR outputs
together is not recommended.
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