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參數(shù)資料
| 型號(hào)： | LTC4308IMS8#TRPBF |
| 廠商： | Linear Technology |
| 文件頁(yè)數(shù)： | 10/16頁(yè) |
| 文件大小： | 168K |
| 描述： | IC BUS BUFFER LV 8-MSOP |
| 產(chǎn)品培訓(xùn)模塊： | LTC4310 - Hot-Swappable I²C Isolators |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 熱交換開(kāi)關(guān) |
| 應(yīng)用： | 通用型緩沖器/總線擴(kuò)展器 |
| 內(nèi)部開(kāi)關(guān)： | 是 |
| 電源電壓： | 2.3 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-MSOP |
| 包裝： | 帶卷 (TR) |
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LTC4308
10
4308f
When powering up into a bus stuck low condition, the
connection circuitry connecting the SDA and SCL pins are
not activated. 30ms after UVLO, automatic clocking and
stop bit generation takes place as described above.
READY Digital Output
This pin provides a digital ag which is low when either
ENABLE is low, the start-up sequence described earlier
in this section has not been completed, or the LTC4308
has disconnected the input and output busses due to a
bus stuck low condition. READY goes high when ENABLE
is high and start-up is complete. The pin is driven by an
open-drain pull-down device capable of sinking 3mA while
holding 0.4V on the pin. Connect a resistor to the bus
pull-up supply to provide the pull-up.
ENABLE
When the ENABLE pin is driven below 0.45V with respect
to the LTC4308s ground, the input pin is disconnected
from the output pin and the READY pin is pulled low.
When the pin is driven above 0.75V , the part waits for
data transactions on both the input and output pins to be
complete (as described in the Start-Up section) before
connecting the two pins. At this time the internal pull-down
on READY releases.
A rising edge on ENABLE after a bus stuck low condition
has occurred forces a connection between SDAIN, SDAOUT ,
and SCLIN, SCLOUT even if the bus stuck low condition
has not been cleared. At this time the 30ms timer is reset,
but not disabled.
Rise Time Accelerators
Once connection has been established, rise time accelera-
tor circuits on SDAOUT and SCLOUT are enabled. During
positive bus transitions of at least 0.8V/約, the rise time
accelerators provide strong, slew-limited pull-up currents
to force the bus voltage to rise at a rate of 100V/約.
The rise time accelerators signi cantly improve reli-
ability and performance in I
2
C systems in several ways.
First, due to the accelerators signi cantly lower pull-up
impedance, as compared to the bus pull-up resistance,
the system is less susceptible to noise on rising edges,
providing smooth, controlled transitions for both small
and large systems. Second, the accelerators allow users
to choose larger bus pull-up resistors, reducing power
consumption and improving logic low noise margins or
to design with bus capacitances beyond those speci ed
in the I
2
C speci cations.
For these reasons, it is strongly recommended that users
choose bus pull-up resistors that guarantee the output
busses will rise on their own at a rate of at least 0.8 V/約 to
ensure activation of the accelerators. See the Applications
Information section for selecting pull-up resistor sizes.
It is important to connect SDAOUT and SCLOUT pins to
a bus whose pull-up supply is equal to or greater than
the LTC4308s supply to ensure the accelerators do not
source current through the pull up resistors into the pull-
up supply.
The rise time accelerators are internally disabled until the
sequence of events described in the start-up section has
been completed, as well as during automatic clocking and
stop bit generation for a bus stuck low recovery event.
OPERATION
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