參數(shù)資料
型號(hào): LTC4270BIUKG#TRPBF
廠商: LINEAR TECHNOLOGY CORP
元件分類(lèi): 模擬信號(hào)調(diào)理
英文描述: SPECIALTY ANALOG CIRCUIT, PQCC52
封裝: 8 X 7 MM, LEAD FREE, PLASTIC, QFN-52
文件頁(yè)數(shù): 20/32頁(yè)
文件大小: 344K
代理商: LTC4270BIUKG#TRPBF
LTC4270/LTC4271
27
42701fa
APPLICATIONS INFORMATION
Figure 16. LTC4270 Discharge Protection
0.22μF
0.25Ω
S1B
PORTn
OUTn
GATEn
SENSEn
AGND
VEE
S1B
42701 F17
–54V
SMAJ58A
LTC4270
0.1μF
ESD/Cable Discharge Protection
Ethernet ports can be subject to significant ESD events
when long data cables, each potentially charged to thou-
sands of volts, are plugged into the low impedance of the
RJ45 jack. To protect against damage, each port requires a
pair of clamp diodes; one to AGND and one to VEE (Figure
16). An additional surge suppressor is required for each
LTC4270 chip from VEE to AGND. The diodes at the ports
steer harmful surges into the supply rails, where they are
absorbed by the surge suppressor and the VEE bypass
capacitance. The surge suppressor has the additional
benefit of protecting the LTC4270 from transients on the
VEE supply.
S1B diodes work well as port clamp diodes, and an
SMAJ58A or equivalent is recommended for the VEE surge
suppressor.
LAYOUT GUIDELINES
Strict adherence to board layout, parts placement and
routing guidelines is critical for optimal current read-
ing accuracy, IEEE compliance, system robustness, and
thermal dissipation. Refer to the DC1682A Demo Board
as a layout reference. Contact LTC Applications to obtain
a full set of layout guidelines, example layouts and BOMs.
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