參數(shù)資料
型號: LTC4259CGW
廠商: LINEAR TECHNOLOGY CORP
元件分類: 電源管理
英文描述: 4-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO36
封裝: 0.300 INCH, PLASTIC, SSOP-36
文件頁數(shù): 8/32頁
文件大?。?/td> 324K
代理商: LTC4259CGW
LTC4259
16
4259i
The LTC4259 will classify a port immediately after a
successful detection cycle in Semiauto or Auto modes, or
when commanded in Manual mode. It measures the PD
classification signature current by applying 18V (typ) to
the port and measuring the resulting current. It reports the
detected class in the Class Status bits in the correspond-
ing Port Status register. Note that in Auto mode, the port
will power up regardless of which class is detected.
The classification circuitry is disabled when the port is in
Shutdown mode, powered up, or the corresponding Class
Enable bit is cleared.
POWER CONTROL
The primary function of the LTC4259 is to control the
delivery of power to the PSE port. It does this by control-
ling the gate drive voltage of an external power MOSFET
while monitoring the current via a sense resistor and the
output voltage at the OUT pin. This circuitry serves to
couple the raw isolated –48V input supply to the port in a
controlled manner that satisfies the PD’s power needs
while minimizing disturbances on the –48V backplane.
Gate Currents
Once the decision has been made to turn on the power to
a port, the LTC4259 uses a 50
A current source to pull up
on the GATE pin. Under normal power-up circumstances,
the MOSFET gate will charge up quickly to VT (the MOSFET
threshold voltage), the MOSFET current will rise quickly to
the current limit level and the GATE pin will be servoed to
maintain the proper IINRUSH charging current. When out-
put charging is complete, the MOSFET current will fall and
the GATE pin will be allowed to continue rising to fully
enhance the MOSFET and minimize its on resistance. The
final VGS is nominally 13V. When a port is turned off, a
50
A current source pulls down on the GATE pin, turning
the MOSFET off in a controlled manner.
No External Capacitors
No external capacitors are required on the GATE pins for
active current limit stability, lowering part count and cost.
This also allows the fastest possible turn-off under severe
overcurrent conditions, providing maximum safety and
protection for the MOSFETs, load devices and board traces.
Connecting capacitors to the external MOSFET gates will
adversely affect the LTC4259’s ability to respond to a
shorted port.
Inrush Control
When the LTC4259 turns on a port, it turns on the MOSFET
by pulling up on the gate. The LTC4259 is designed to
power up the port in current limit, limiting the inrush
current to IINRUSH.
The port voltage will quickly rise to the point where the PD
reaches its input turn-on threshold and begins to draw
current to charge its bypass capacitance, slowing the rate
of port voltage increase.
The 802.3af specification lists two separate maximum
current limits, ILIM and IINRUSH. Because they have iden-
tical values, the LTC4259 implements both as a single
current limit using VLIM (described below). Their func-
tions are differentiated through the use of tICUT and tSTART,
respectively (see tICUT Timing and tSTART Timing sec-
tions). To maintain consistency with the specification, the
IINRUSH term is used when referring to an initial tSTART
power-up event.
APPLICATIO S I FOR ATIO
WU
UU
Figure 14. PD Classification
VOLTAGE (VCLASS)
0
CURRENT
(mA)
60
50
40
30
20
10
0
510
15
20
4259 F14
25
TYPICAL
CLASS 3
PD
48mA
33mA
23mA
14.5mA
6.5mA
CLASS 4
CLASS 2
CLASS 1
CLASS 0
CLASS 3
OVER
CURRENT
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