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參數(shù)資料
| 型號： | LTC4227CUFD-2#PBF |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 電源管理 |
| 英文描述： | POWER SUPPLY MANAGEMENT CKT, PQCC20 |
| 封裝： | 4 X 5 MM, LEAD FREE, PLASTIC, MO-220, QFN-20 |
| 文件頁數(shù)： | 8/20頁 |
| 文件大?。?/td> | 307K |
| 代理商： | LTC4227CUFD-2#PBF |
LTC4227-1/LTC4227-2
16
422712f
applicaTions inForMaTion
For CL = 680F, the time it takes to charge up CL is cal-
culated as:
tCHARGE =
CL VIN
IINRUSH
=
680F 12V
0.5A
= 16ms
The inrush current is set to 0.5A by adding capacitance,
CHG, at the gate of the Hot Swap MOSFET.
CHG =
CL IHGATE(UP)
IINRUSH
=
680F 10A
0.5A
15nF
The average power dissipated in the MOSFET is calculated
as:
PAVG =
ECL
tCHARGE
=
1
2
680F 12V
( )2
16ms
= 3W
The MOSFET selected must be able to tolerate 3W for
16ms during power-up. The SOA curves of the Si7336ADP
provide for 1.5A at 30V (45W) for 100ms. This is suffi-
cient to satisfy the requirement. The increase in junction
temperature due to the power dissipated in the MOSFET
is
T = PAVG ZthJC where ZthJC is the junction-to-case
thermal impedance. Under this condition, the Si7336ADP
data sheet indicates that the junction temperature will
increase by 2.4°C using ZthJC = 0.8°C/W (single pulse).
The duration and magnitude of the power pulse during
an output short is a function of the TMR capacitance, CT,
and the LTC4227’s active current limit. The short-circuit
duration is given as CT 12[ms/F] = 1.2ms for CT = 0.1F.
The maximum short-circuit current is calculated using the
maximumactivecurrentlimitthreshold,
VSENSE(ACL)(MAX)
and minimum RS value.
ISHORT(MAX) =
VSENSE(ACL)(MAX)
RS(MIN)
=
70mV
5.94m
= 11.8A
So, the maximum power dissipated in the MOSFET is
11.8A 12V = 142W for 1.2ms. The Si7336ADP data
sheet indicates that the worst-case increase in junc-
tion temperature during this short-circuit condition is
21.3°C using ZthJC = 0.15°C/W (single pulse). Choosing
CT = 0.1F will not cause the maximum junction tempera-
ture of the MOSFET to be exceeded. The SOA curves of
the Si7336ADP provide for 6A at 30V (180W) for 10ms.
This also satisfies the requirement.
Next, select the resistive divider at the ON pin to provide
an undervoltage threshold of 9.6V for the 12V supply at
SENSE+. First, choose the bottom resistor, R1, to be 20k.
Then, calculate the top resistor value for R2:
R2
=
VIN(UVTH)
VON(TH)
– 1
R1
R2
=
9.6V
1.235V
– 1
20k
= 135k
Choose the nearest 1% resistor value of 137k for R2. In
addition, there is a 0.1F bypass, C1, at the INTVCC pin
and a 10nF filter capacitor, CF, at the ON pin to prevent the
supply glitches from turning off the Hot Swap MOSFET.
PCB Layout Considerations
ForproperoperationoftheLTC4227’scircuitbreaker,Kelvin
connectiontothesenseresistorisstronglyrecommended.
The PCB layout should be balanced and symmetrical to
minimize wiring errors. In addition, the PCB layout for the
senseresistorandthepowerMOSFETshouldincludegood
thermalmanagementtechniquesforoptimaldevicepower
dissipation. A recommended PCB layout is illustrated in
Figure 7.
Connect the IN and OUT pin traces as close as possible to
the MOSFETs’ terminals. Keep the traces to the MOSFETs
wideandshorttominimizeresistivelosses.ThePCBtraces
associated with the power path through the MOSFETs
should have low resistance. The suggested trace width for
1oz copper foil is 0.03" for each ampere of DC current to
keep PCB trace resistance, voltage drop and temperature
rise to a minimum. Note that the sheet resistance of 1oz
copper foil is approximately 0.5mΩ/square, and voltage
drops due to trace resistance add up quickly in high cur-
rent applications.
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