參數(shù)資料
型號(hào)： LTC4215IUFD-2#TR
廠商： LINEAR TECHNOLOGY CORP
元件分類： 電源管理
英文描述： 1-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC24
封裝： 4 X 5 MM, PLASTIC, MO-220, QFN-24
文件頁(yè)數(shù)： 3/28頁(yè)
文件大小： 261K
代理商： LTC4215IUFD-2#TR
LTC4215/LTC4215-2
11
4215fe
The LTC4215 is designed to turn a board’s supply voltage
on and off in a controlled manner, allowing the board to be
safely inserted or removed from a live backplane. During
normal operation, the charge pump and gate driver turn
on an external N-channel MOSFET’s gate to pass power
to the load. The gate driver uses a charge pump that
derives its power from the VDD pin. Also included in the
gate driver is an internal 6.5V GATE-to-SOURCE clamp.
During start-up the inrush current is tightly controlled by
using current limit foldback, soft start dI/dt limiting and
output dV/dt limiting.
The current sense (CS) amplier monitors the load current
using the difference between the SENSE+ (VDD for SSOP)
and SENSE– pin voltages. The CS amplier limits the cur-
rent in the load by pulling back on the GATE-to-SOURCE
voltage in an active control loop when the sense voltage
exceeds the commanded value. The CS amplier requires
20μA input bias current from both the SENSE+ and the
SENSE– pins.
A short circuit on the output to ground results in excessive
power dissipation during active current limiting. To limit
this power, the CS amplier regulates the voltage between
the SENSE+ and SENSE– pins at 75mV.
If an overcurrent condition persists, the internal circuit
breaker (CB) registers a fault when the sense voltage ex-
ceeds 25mV for more than 20μs in the case of the LTC4215
or 420μs in the case of the LTC4215-2. This indicates to
the logic that it is time to turn off the GATE to prevent
overheating. At this point the start-up TIMER pin voltage
ramps down using the 2μA current source until the volt-
age drops below 0.2V (comparator TM1) which tells the
logic that the pass transistor has cooled and it is safe to
turn it on again if overcurrent auto-retry is enabled. If the
TIMER pin is tied to INTVCC, the cool-down time defaults
to 5 seconds on an internal system timer in the logic.
The output voltage is monitored using the FB pin and the
Power Good (PG) comparator to determine if the power
is available for the load. The power good condition can be
signaled by the GPIO pin using an open-drain pulldown
transistor. The GPIO pin may also be congured to signal
power bad, or as a general purpose input (GP comparator),
or a general purpose open drain output.
The Functional Diagram shows the monitoring blocks of
the LTC4215. The group of comparators on the left side
includes the undervoltage (UV), overvoltage (OV), reset
(RST), enable (EN) and signal on (ON) comparators. These
comparators determine if the external conditions are valid
prior to turning on the GATE. But rst the two undervoltage
lockout circuits, UVLO1 and UVLO2, validate the input
supply and the internally generated 3.1V supply, INTVCC.
UVLO2 also generates the power-up initialization to the
logic circuits as INTVCC crosses this rising threshold. If the
xed internal overvoltage comparator, OV2, detects that
VDD is greater than 15.6V, the part immediately generates
an overvoltage fault and turns the GATE off.
Included in the LTC4215 is an 8-bit A/D converter. The con-
verter has a 3-input multiplexer to select between the ADIN
pin, the SOURCE pin and the VDD – SENSE voltage.
An I2C interface is provided to read the A/D registers. It
also allows the host to poll the device and determine if
faults have occurred. If the ALERT line is congured as an
interrupt, the host is enabled to respond to faults in real
time. The typical SDA line is divided into an SDAI (input)
and SDAO (output). This simplies applications using an
optoisolator driven directly from the SDAO output. An ap-
plication which uses optoisolation is shown in Figure 14.
The I2C device address is decoded using the ADR0, ADR1
and ADR2 pins. These inputs have three states each that
decode into a total of 27 device addresses. ADR1 and
ADR2 are not available in the SSOP package; therefore,
those pins are NC in the address map.
OPERATION
相關(guān)PDF資料
PDF描述
LTC4215IUFD-2#TRPBF 1-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC24
LTC4215CUFD-2#TRPBF 1-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC24
LTC4215IUFD-2 1-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC24
LTC4215IUFD-3#TR 1-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC24
LTC4215CUFD-3#TRPBF 1-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC24
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LTC4215IUFD-3#PBF 功能描述:IC CTRLR HOT SWAP 24-QFN RoHS:是 類別:集成電路 (IC) >> PMIC - 熱交換 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:119 系列:- 類型:熱交換控制器 應(yīng)用:通用型，PCI Express? 內(nèi)部開關(guān):無(wú) 電流限制:- 電源電壓:3.3V，12V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:80-TQFP 供應(yīng)商設(shè)備封裝:80-TQFP（12x12） 包裝:托盤 產(chǎn)品目錄頁(yè)面:1423 (CN2011-ZH PDF)
LTC4215IUFD-3#TRPBF 功能描述:IC CTRLR HOT SWAP 24-QFN RoHS:是 類別:集成電路 (IC) >> PMIC - 熱交換 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:119 系列:- 類型:熱交換控制器 應(yīng)用:通用型，PCI Express? 內(nèi)部開關(guān):無(wú) 電流限制:- 電源電壓:3.3V，12V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:80-TQFP 供應(yīng)商設(shè)備封裝:80-TQFP（12x12） 包裝:托盤 產(chǎn)品目錄頁(yè)面:1423 (CN2011-ZH PDF)
LTC4216 制造商:LINER 制造商全稱:Linear Technology 功能描述:Dual Hot Swap Controller
LTC4216CDE 制造商:Linear Technology 功能描述:Hot Swap Controller 1-CH 6V 12-Pin DFN EP
LTC4216CDE#PBF 功能描述:IC CTLR HOT SWAP 12-DFN RoHS:是 類別:集成電路 (IC) >> PMIC - 熱交換 系列:- 標(biāo)準(zhǔn)包裝:50 系列:- 類型:熱交換控制器 應(yīng)用:-48V 遠(yuǎn)程電力系統(tǒng)，AdvancedTCA ? 系統(tǒng)，高可用性 內(nèi)部開關(guān):無(wú) 電流限制:可調(diào) 電源電壓:11.5 V ~ 14.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:10-TFSOP，10-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:10-MSOP 包裝:管件
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*