參數(shù)資料
型號(hào): LTC4211IMS8
廠商: Linear Technology
文件頁(yè)數(shù): 14/40頁(yè)
文件大?。?/td> 321K
描述: IC CONTROLLER HOT SWAP 8-MSOP
標(biāo)準(zhǔn)包裝: 50
類型: 熱交換控制器
應(yīng)用: 通用
內(nèi)部開(kāi)關(guān): 無(wú)
電源電壓: 2.5 V ~ 16.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 8-MSOP
包裝: 管件
LTC4211
14
4211fb
OPERATION
UNDERVOLTAGE LOCKOUT
The LTC4211s power-on reset circuit initializes the start-
up procedure and ensures the chip is in the proper state if
the input supply voltage is too low. If the supply voltage
falls below 2.18V, the LTC4211 is in undervoltage lockout
(UVLO) mode, and the GATE pin is pulled low. Since the
UVLO circuitry uses hysteresis, the chip restarts after the
supply voltage rises above 2.3V and the ON pin goes high.
In addition, users can utilize the ON comparator (COMP1)
or the FAULT comparator (COMP6) to effectively program
a higher undervoltage lockout level. Figure 3 shows how
the external resistor divider at the ON pin programs the
systems undervoltage lockout voltage. The system will
enter the plug-in cycle after the ON pin rises above 1.316V.
The resistor divider sets the circuit to turn on when V
CC
 
reaches around 79% of its final value. If a different turn on
V
CC
 voltage is desired change the resistor divider values
accordingly. Alternatively, the FAULT comparator can be
used to configure the external undervoltage lockout level.
If the FAULT comparator is used for this purpose, the
system will wait for the input voltage to increase above
the level set by the user before starting the second timing
cycle. Also, if the input voltage drops below the set level
in normal operating mode, the user must cycle the ON pin
or V
CC
 to restart the system.
GLITCH FILTER FOR RESET
The LTC4211 has a glitch filter to prevent transients on the
FB pin from generating a system reset. The relationship
between glitch filter time and the FB transient voltage is
shown in Figure 4.
Figure 4. FB Comparator Glitch Filter Time
vs Feedback Transient Voltage
Figure 3. ON Pin Sets the Undervoltage
Lockout Voltage Externally
SYSTEM TIMING
System timing for the LTC4211 is generated at the TIMER
pin (see the Block Diagram). If the LTC4211s internal
timing circuit is off, an internal N-channel FET connects
the TIMER pin to GND. If the timing circuit is enabled,
an internal 2糀 current source is then connected to the
TIMER pin to charge C
TIMER
 at a rate given by Equation 1:
 
TIMER
Charge-Up Rate =
2礎(chǔ)
C
 
(1)
When the TIMER pin voltage reaches COMP4s threshold
of 1.236V, the TIMER pin is reset to GND. Equation 2 gives
an expression for the timer period:
 
TIMER
=1.236V"
C
TIMER
2礎(chǔ)
 
(2)
As a design aid, the LTC4211s timer period as a function
of the C
TIMER
 using standard values from 3.3nF to 0.33糉
is shown in Table 1.
V
IN
3.3V
R1
10k
R2
10k
ON PIN
(a) 3.3V
IN
V
IN
5V
R1
20k
R2
10k
ON PIN
(b) 5V
IN
V
IN
12V
R1
61.9k
R2
10k
ON PIN
(c) 12V
IN
4211 F03
FB TRANSIENT (mV)
0
150
200
250
160
4211 F04
100
50
0
40
80
120
20
180
60
100
140
200
T
A
 = 25癈
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