參數(shù)資料
型號(hào): LTC4155IUFD#PBF
廠商: LINEAR TECHNOLOGY CORP
元件分類: 電源管理
英文描述: POWER SUPPLY SUPPORT CKT, PQCC28
封裝: 5 X 4 MM, 0.75 MM HEIGHT, PLASTIC, MO-220WXXX-X, QFN-28
文件頁數(shù): 14/52頁
文件大?。?/td> 473K
代理商: LTC4155IUFD#PBF
LTC4155
21
4155f
ID Pin Detection
For USB On-The-Go compatibility, the step-up switching
regulator can optionally start autonomously when the
grounded ID pin in the A side of an On-The-Go cable is
detected.
The ID pin is monitored at all times. Its status is reported
in the I2C bit ID_DETECT, reporting true when the ID pin
is grounded. Optionally, any change in ID_PIN_DETECT
may trigger an interrupt request to notify the system
processor. Unless the I2C LOCKOUT_ID_PIN bit has
been set, ID pin detection will also automatically start
the step-up regulator. Note that LOCKOUT_ID_PIN locks
out automatic start-up, but not monitoring of the ID pin.
Also, the REQUEST_OTG command may be used to en-
able the step-up regulator, independent of the state of
ID_PIN_DETECT and LOCKOUT_ID_PIN. Note that the
regulator will not start if input power is already present
on either input. The I2C status bits OTG_ENABLED and
OTG_FAULT can be used to determine if the regulator is
running.
The ID pin detection circuit will report a short on the ID
pin for ID pin impedances lower than approximately 24k.
The USB Battery Charging Specification Rev 1.1 added
additionalsignalingtotheIDpin,specifyingotherpossible
ID pin resistances of RID_A, RID_B and RID_C. These
impedances are all larger than the 24k threshold and will
typically not cause an ID pin short detection.
Dual Input Overvoltage Protection and
Undervoltage Lockout
The LTC4155 can provide overvoltage protection to its
two power inputs with minimal external components, as
shown in Figure 2.
The LTC4155 acts as a shunt regulator when the input is
overvoltage,clampingUSBSNSorWALLSNSto6V.Resis-
tors R1 and R2 should be 3.6k and be rated appropriately
fortheworst-casepowerdissipationduringanovervoltage
event. The power dissipated in the resistor is given by the
following expression:
PRESISTOR =
(VOVERVOLTAGE 6V)
3.6k
2
For example, a typical 0201 size resistor would be ap-
propriate for possible overvoltage events up to 19V. An
0402 size resistor would be appropriate up to 20V, an
0603 up to 24V, an 0805 up to 27V, and a 1206 up to 35V.
Additional power derating may be necessary at elevated
ambient temperature. The maximum allowed shunt cur-
rent into the USBSNS and WALLSNS pins constrains the
upper limit of protection to 77V.
The drain-source voltage rating, VDS, of N-channel FETs
MN1-MN2 must be appropriate for the level of overvolt-
age protection desired, as the full magnitude of the input
voltage is applied across one of these devices.
The drain-source voltage rating of N-channel FETs MN3-
MN4 need only be as high as the protection threshold,
typically 6.2V. MN3-MN4 are not required for overvoltage
protection,butarerequiredtoblockcurrentfromcirculating
from one input to the other through the unused channel’s
FETbodydiode.Forsingle-inputapplications,onlyasingle
power FET is required. Refer to Alternate Input Power
Configurations in the Applications Information section
for implementation details.
Negative voltage protection can be added by reconfiguring
thecircuitwithoutaddinganyadditionalpowertransistors.
Refer to Alternate Input Power Configurations in the Ap-
plications Information section for implementation details.
For an input (USB or WALL) to be considered a valid
power source, it must satisfy three conditions. First, it
must be above a minimum voltage, VUVLO. Second, it
must be greater than the battery voltage by a minimum of
VDUVLO.Lastly,itmustbebelowtheovervoltageprotection
thresholdvoltage,VOVLO.TheUSBSNSandWALLSNSpins
each draw a small current which causes a voltage offset
between the USB and WALL inputs and the USBSNS and
Figure 2. Dual-Input Overvoltage Protection Mulitplexer
VBUS
TO USB
INPUT
TO WALL
INPUT
OVGCAP
USBGT
USBSNS
WALLGT
LTC4155
WALLSNS
4155 F02
MN1
R1
R2
MN3
MN2
MN4
OPERATION
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