參數(shù)資料
型號(hào): LTC3880IUJ-1#PBF
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: 0.1 A DUAL SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PQCC40
封裝: 6 X 6 MM, LEAD FREE, PLASTIC, WJJD-2, QFN-40
文件頁數(shù): 53/112頁
文件大?。?/td> 2182K
代理商: LTC3880IUJ-1#PBF
LTC3880/LTC3880-1
45
3880fa
APPLICATIONS INFORMATION
typically 4.5V for logic level devices. The UVLO on INTVCC
(EXTVCC) is set to approximately 4V. Both a LTC3880 and
LTC3880-1 are valid for this configuration.
TOPSIDE MOSFET DRIVER SUPPLY (CB, DB)
External bootstrap capacitors CB connected to the BOOST
pinssupplythegatedrivevoltagesforthetopsideMOSFETs.
Capacitor CB in the Block Diagram is charged though
external diode DB from INTVCC when the SW pin is low.
When one of the topside MOSFETs is to be turned on,
the driver places the CB voltage across the gate source
of the desired MOSFET. This enhances the MOSFET and
turns on the topside switch. The switch node voltage, SW,
rises to VIN and the BOOST pin follows. With the topside
MOSFET on, the boost voltage is above the input supply:
VBOOST = VIN + VINTVCC. The value of the boost capacitor
CB needs to be 100 times that of the total input capa-
citance of the topside MOSFET(s). The reverse break-
down of the external Schottky diode must be greater
than VIN(MAX). When adjusting the gate drive level, the
final arbiter is the total input current for the regulator. If
a change is made and the input current decreases, then
the efficiency has improved. If there is no change in input
current, then there is no change in efficiency.
PWM jitter has been observed in some designs operating
at higher VIN/VOUT ratios. This jitter does not substantially
affect the circuit accuracy. Referring to Figure 24, PWM
jitter can be removed by inserting a series resistor with a
value of 1Ω to 5Ω between the cathode of the diode and
the BOOSTn pin. A resistor case size of 0603 or larger is
recommended to reduce ESL and achieve the best results.
UNDERVOLTAGE LOCKOUT
The LTC3880 is initialized by an internal threshold-based
UVLO where VIN must be approximately 4V and INTVCC/
EXTVCC, VDD33, VDD25 must be within approximately 20%
of the regulated values. In addition, VDD33 must be within
approximately 7% of the targeted value before the RUN
pin is released. After the part has initialized, an additional
comparator monitors VIN. The VIN_ON threshold must
be exceeded before the power sequencing can begin.
When VIN drops below the VIN_OFF threshold, the RUN
pins will be pulled low and VIN must increase above the
VIN_ON threshold before the controller will restart. The
normal start-up sequence will be allowed after the VIN_ON
threshold is crossed.
It is possible to program the contents of the NVM in the
application if the VDD33 supply is externally driven. This
will activate the digital portion of the LTC3880 without
engaging the high voltage sections. PMBus communica-
tions are valid in this supply configuration. If VIN has not
been applied to the LTC3880, bit 3 (NVM Not Initialized)
in MFR_COMMON will be asserted low. If this condition is
detected,thepartwillonlyrespondtoaddresses5Aand5B.
To initialize the part issue the following set of commands:
global address 0x5B command 0xBD data 0x2B followed
by global address 5B command 0xBD and data 0xC4. The
part will now respond to the correct address. Configure
the part as desired then issue a STORE_USER_ALL. When
VIN is applied a MFR_RESET command must be issued to
allow the PWM to be enabled and valid ADC conversions
to be read.
CIN AND COUT SELECTION
The selection of CIN is simplified by the 2-phase architec-
ture and its impact on the worst-case RMS current drawn
throughtheinputnetwork(battery/fuse/capacitor).Itcanbe
shown that the worst-case capacitor RMS current occurs
when only one controller is operating. The controller with
the highest (VOUT)(IOUT) product needs to be used in the
formula below to determine the maximum RMS capacitor
current requirement. Increasing the output current drawn
from the other controller will actually decrease the input
RMS ripple current from its maximum value. The out-of-
phasetechniquetypicallyreducestheinputcapacitor’sRMS
Figure 24. Boost Circuit to Minimize PWM Jitter
VIN
TGATE
LTC3880
LTC3880-1
SW
INTVCC
BOOST
0.2F
VIN
10F
3880 F24
BGATE
PGND
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