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LTC3812-5
27
38125fb
EFFICIENCY CONSIDERATIONS
The percent efciency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efciency and which change would
produce the most improvement. Although all dissipative
elements in the circuit produce losses, four main sources
account for most of the losses in LTC3812-5 circuits:
1. DC I2R losses. These arise from the resistances of the
MOSFETs, inductor and PC board traces and cause the
efciency to drop at high output currents. In continuous
mode the average output current ows through L, but is
choppedbetweenthetopandbottomMOSFETs.Ifthetwo
MOSFETs have approximately the same RDS(ON), then
the resistance of one MOSFET can simply be summed
with the resistances of L and the board traces to obtain
the DC I2R loss. For example, if RDS(ON) = 0.01Ω and
RL = 0.005Ω, the loss will range from 15mW to 1.5W
as the output current varies from 1A to 10A.
2. Transition loss. This loss arises from the brief amount
of time the top MOSFET spends in the saturated region
during switch node transitions. It depends upon the
input voltage, load current, driver strength and MOSFET
capacitance, among other factors. The loss is signicant
at input voltages above 20V and can be estimated from
the second term of the PMAINequationfoundinthePower
MOSFET Selection section. When transition losses are
signicant, efciency can be improved by lowering the
frequency and/or using a top MOSFET(s) with lower
CRSS at the expense of higher RDS(ON).
3. INTVCC current. This is the sum of the MOSFET
driver and control currents. Control current is typically
about 3mA and driver current can be calculated by:
IGATE = f(QG(TOP) + QG(BOT)), where QG(TOP) and QG(BOT)
are the gate charges of the top and bottom MOSFETs.
This loss is proportional to the supply voltage that
INTVCC is derived from, i.e., VIN for the external NMOS
linear regulator, VOUT for the internal EXTVCC regula-
tor, or VEXT when an external supply is connected to
INTVCC.
4. CIN loss. The input capacitor has the difcult job of l-
tering the large RMS input current to the regulator. It
must have a very low ESR to minimize the AC I2R loss
and sufcient capacitance to prevent the RMS current
from causing additional upstream losses in fuses or
batteries.
Other losses, including COUT ESR loss, Schottky diode D1
conduction loss during dead time and inductor core loss
generally account for less than 2% additional loss. When
making adjustments to improve efciency, the input cur-
rent is the best indicator of changes in efciency. If you
make a change and the input current decreases, then the
efciency has increased. If there is no change in input
current, then there is no change in efciency.
CHECKING TRANSIENT RESPONSE
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
load step occurs, VOUT immediately shifts by an amount
equal to ΔILOAD (ESR), where ESR is the effective series
resistance of COUT. ΔILOAD also begins to charge or dis-
charge COUT generating a feedback error signal used by the
regulator to return VOUT to its steady-state value. During
this recovery time, VOUT can be monitored for overshoot
or ringing that would indicate a stability problem.
DESIGN EXAMPLE
As a design example, take a supply with the following
specications: VIN = 12V to 60V, VOUT = 5V ±5%, IOUT(MAX)
= 6A, f = 250kHz. First, calculate the timing resistor:
RON =
5V
2.4V 250kHz 76pF
= 110k
and choose the inductor for about 40% ripple current at
the maximum VIN:
L
=
5V
250kHz 0.4 6A
1
5V
60V
= 7.6μH
With a 7.7μH inductor, ripple current will vary from 1.5A
to 2.4A (25% to 40%) over the input supply range.
Next, choose the bottom MOSFET switch. Since the
drain of the MOSFET will see the full supply voltage 60V
APPLICATIONS INFORMATION