參數(shù)資料
型號: LTC3568EDD#TR
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: 4 A SWITCHING REGULATOR, 4000 kHz SWITCHING FREQ-MAX, PDSO10
封裝: 3 X 3 MM, PLASTIC, MO-229WEED-2, DFN-10
文件頁數(shù): 6/18頁
文件大?。?/td> 300K
代理商: LTC3568EDD#TR
LTC3568
3568fa
applicaTions inForMaTion
DesignExample
Asadesignexample,considerusingtheLTC3568inatypical
application with VIN = 5V. The load requires a maximum
of 1.8A in active mode and 10mA in standby mode. The
output voltage is VOUT = 2.5V. Since the load still needs
power in standby, Burst Mode operation is selected for
good low load efficiency.
First, calculate the timing resistor:
R
MHz
k
T =
(
)
=
9 78 10 1
323 8
11
1 08
.
.
Use a standard value of 324k. Next, calculate the inductor
value for about 40% ripple current at maximum VIN:
L
V
MHz
mA
V
H
=
=
2 5
1
720
1
2 5
5
1 7
.
.
Choosing the closest inductor from a vendor of 2H,
results in a maximum ripple current of:
Δ =
=
I
V
MHz
V
mA
L
2 5
1
2
1
2 5
5
625
.
.
For cost reasons, a ceramic capacitor will be used. COUT
selection is then based on load step droop instead of ESR
requirements. For a 5% output droop:
C
A
MHz
V
F
OUT
=
2 5
1 8
1
5
2 5
36
.
( % . )
The closest standard value is 22F plus 10F. Since the
supply’s output impedance is very low, CIN is typically a
22F. In noisy environments, decoupling SVIN from PVIN
with an R6/C8 filter of 1
Ω/0.1F may help, but is typically
not needed.
The output voltage can now be programmed by choosing
the values of R1 and R2. To maintain high efficiency, the
current in these resistors should be kept small. Choosing
2A with the 0.8V feedback voltage makes R1~400k. A
close standard 1% resistor is 412k and R2 is then 887k.
The compensation should be optimized for these compo-
nentsbyexaminingtheloadstepresponsebutagoodplace
to start for the LTC3568 is with a 13k
Ω and 1000pF filter.
The output capacitor may need to be increased depending
on the actual undershoot during a load step.
The PGOOD pin is a common drain output and requires
a pull-up resistor. A 100k resistor is used for adequate
speed.
Figure 1 shows the complete schematic for this design
example.
BoardLayoutConsiderations
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3568. These items are also illustrated graphically
in the layout diagram of Figure 6. Check the following in
your layout:
Figure6.LTC3568LayoutDiagram(SeeBoardLayoutChecklist)
PVIN
LTC3568
PGND
SW
SVIN
SGND
PGOOD
VFB
SYNC/MODE
ITH
SHDN/RT
L1
VIN
BM
PS
VIN
VOUT
R5
RT
R3
R1
R2
3568 F06
C3
BOLD LINES INDICATE HIGH CURRENT PATHS
CIN
COUT
C4
相關(guān)PDF資料
PDF描述
LTC3568IDD 4 A SWITCHING REGULATOR, 4000 kHz SWITCHING FREQ-MAX, PDSO10
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