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參數(shù)資料
| 型號： | LTC3553EUD#TRPBF |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC20 |
| 封裝： | 3 X 3 MM, 0.75 MM HEIGHT, LEAD FREE, PLASTIC, QFN-20 |
| 文件頁數(shù)： | 22/36頁 |
| 文件大?。?/td> | 518K |
| 代理商： | LTC3553EUD#TRPBF |
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LTC3553
29
3553fa
OPERATION
In the typical case where the BUCK_ON and LDO_ON
pins are driven by logic powered by the regulators, the
BUCK_ON and LDO_ON pins would also go low, as depicted
in Figure 12. If the external supply recovers after entering
the PDN2 state such that VOUT is no longer in UVLO, then
the LTC3553 will transition back into the PUP2 state once
the PDN2 one second delay is complete. Following the
state diagram, the transition from PDN2 to PUP2 in this
case actually occurs via a brief visit to the POFF state.
During the brief POFF state, the state machine immedi-
ately recognizes that valid external power is available and
transitions into the PUP2 state. Entering the PUP2 state
will cause the buck and LDO to sequence up as described
previously in the power-up sections.
Not depicted here, but in cases where the BUCK_ON or
LDO_ON pin is driven by a supply other than the LDO or
buck that remains high when entering the POFF state,
then as per the state diagram in Figure 7, the pushbutton
circuitry will enter the PON state once VOUT is no longer
in UVLO. Upon entering the PON state, the enabled
regulator(s) will power up.
Note: If VOUTdropstoolow(belowabout1.9V)theLTC3553
will see this as a POR condition and will enter the PDN1
state rather than the PDN2 state. One second later the part
will transition to the HR state. Under these conditions an
explicit power-up event (such as a pushbutton press) may
be required to bring the LTC3553 out of hard reset.
Hard Reset Timing
HARD RESET provides an ultralow power-down state for
shipping or long term storage as well as a way to power
down the application in case of a software lockup. In the
case of software lockup, the user can hold the pushbutton
(ON low) for ve seconds and a hard reset event (HRST)
will occur, placing the pushbutton circuitry in the power-
down (PDN1) state. At this point the regulators will be shut
down. Following a one second power-down period the
pushbutton circuitry will enter the hard reset state (HR).
Holding ON low through the one second power-down
period will not cause a power-up event at end of the one
second period. ON must be brought high following the
power-down event and then go low again for 400ms to
establish a valid power-up event, as shown in Figure 13.
BAT
VBUS
ON (PB)
PBSTAT
BUCK
LDO
SEQ
BUCK_ON
LDO_ON
STATE
PON
PUP1
HR
PDN1
3553 TD06
400ms
50ms
5s
1s
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Figure 13. Hard Reset via Holding ON Low for Five Seconds
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| LTC3553EUD#PBF | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC20 |
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