參數(shù)資料
型號: LTC3127EDD#PBF
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: SWITCHING REGULATOR, PDSO10
封裝: 3 X 3 MM, 0.75 MM HEIGHT, LEAD FREE, PLASTIC, MO-229WEED-2, DFN-10
文件頁數(shù): 18/20頁
文件大?。?/td> 366K
代理商: LTC3127EDD#PBF
LTC3127
3127f
pin FuncTions
SW1 (Pin 1): Switch Pin Where Internal Switches A and
B Are Connected. Connect inductor from SW1 to SW2.
Minimize trace length to reduce EMI.
VIN (Pin 2): Input Supply Pin. Internal VCC for the IC. A
10μF or greater ceramic capacitor should be placed as
close to VIN and PGND as possible.
SHDN (Pin 3): Logic-Controlled Shutdown Input.
SHDN = High: Normal Operation
SHDN = Low: Shutdown
MODE (Pin 4): Pulse Width Modulation/Burst Mode
Selection Input.
MODE = High: Burst Mode Operation
MODE = Low: PWM Operation Only. Forced continuous
conduction mode.
PROG (Pin 5): Sets the Average Input Current Limit
Threshold. Connect a resistor from PROG to ground. See
below for component value selection.
RPROG = 54.92 ILIMIT (A) + 4.94 (kΩ)
SGND (Pin 6): Signal Ground for the IC. Terminate the
PROG resistor, compensation components and the output
voltage divider to SGND.
FB(Pin7):FeedbackPin.Connectresistordividertaphere.
The output voltage can be adjusted from 1.8V to 5.25V.
The feedback reference voltage is 1.195V.
V
R
V
OUT =
+
1 195
1
2
1
.
VC (Pin 8): Error Amplifier Output. Place compensation
components from this pin to SGND.
VOUT(Pin9):OutputoftheSynchronousRectifier.Connect
theoutputfiltercapacitorfromthispintoGND.Aminimum
value of 22F is recommended. Output capacitors must
be low ESR.
SW2 (Pin 10): Switch Pin Where Internal Switches C and
D Are Connected. Minimize trace length to reduce EMI.
PGND(ExposedPadPin11):PowerGround.Theexposed
pad must be soldered to the PCB ground plane.
(DD Package)
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