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參數(shù)資料
| 型號： | LTC2942CDCB#TRPBF |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 電源管理 |
| 英文描述： | POWER SUPPLY SUPPORT CKT, PDSO6 |
| 封裝： | 2 X 3 MM, LEAD FREE, PLASTIC, MO-229, DFN-6 |
| 文件頁數(shù)： | 18/18頁 |
| 文件大?。?/td> | 227K |
| 代理商： | LTC2942CDCB#TRPBF |
LTC2942
9
2942fa
applicaTions inFormaTion
Status Register (A)
The status of the charge, voltage and temperature alerts
is reported in the status register shown in Table 2.
Table 2. Status Register A (Read only)
BIT NAME
OPERATION
DEFAULT
A[7] Chip Identification
0: LTC2942
1: LTC2941
0
A[6] Reserved
0
A[5] Accumulated Charge
Overflow/Underflow
Indicates that the value of the
ACR hit either top or bottom.
0
A[4] Temperature Alert
Indicates one of the
temperature limits was
exceeded.
0
A[3] Charge Alert High
Indicates that the ACR value
exceeded the charge threshold
high limit.
0
A[2] Charge Alert Low
Indicates that the ACR value
dropped below the charge
threshold low limit.
0
A[1] Voltage Alert
Indicates one of the battery
voltage limits was exceeded.
0
A[0] Undervoltage
Lockout Alert
Indicates recovery from
undervoltage. If set to 1, a
UVLO has occurred and the
contents of the registers are
uncertain.
X
All status register bits except A[7] are cleared after being
read by the host, if the conditions which set these bits
have been removed.
As soon as one of the three measured quantities exceeds
the programmed limits, the corresponding bit A[4], A[3],
A[2] or A[1] in the status register is set.
BitA[5]issetiftheLTC2942’saccumulatedchargeregisters
(ACR) overflows or underflows. In these cases, the ACR
stays at FFFFh or 0000h and does not roll over.
The undervoltage lockout (UVLO) bit of the status register
A[0] is set if, during operation, the voltage on SENSE+
pin drops below 2.7V without reaching the POR level.
The analog parts of the coulomb counter are switched off
while the digital register values are retained. After recov-
ery of the supply voltage the coulomb counter resumes
integrating with the stored value in the accumulated
charge registers but it has missed any charge flowing
while SENSE+ < 2.7V.
The hard-coded bit A[7] of the status register enables the
host to distinguish the LTC2942 from the pin compatible
LTC2941, allowing the same software to be used with
both devices.
Control Register (B)
The operation of the LTC2942 is controlled by program-
ming the control register. Table 3 shows the organization
of the 8-bit control register B[7:0].
Table 3. Control Register B
BIT
NAME
OPERATION
Default
B[7:6] ADC Mode
[11] Automatic Mode.
Performs voltage and temperature
conversion every second.
[10] Manual Voltage Mode.
Performs single voltage
conversion, then sleeps.
[01] Manual Temperature Mode.
Performs single temperature
conversion, then sleeps.
[00] Sleep.
[00]
B[5:3] Prescaler M
Sets coulomb counter prescaling
factor M between 1 and 128.
Default is 128.
M = 2(4 B[5] + 2 B[4] + B[3])
[111]
B[2:1] AL/CC Configure Configures the AL/CC pin.
[10] Alert Mode.
Alert functionality enabled.
Pin becomes logic output.
[01] Charge Complete Mode.
Pin becomes logic input and
accepts “charge complete” signal
(e.g., from a charger) to set
accumulated charge register (C, D)
to FFFFh.
[00] AL/CC pin disabled.
[11] Not allowed.
[10]
B[0]
Shutdown
Shut down analog section to
reduce ISUPPLY.
[0]
Power Down B[0]
Setting B[0] to 1 shuts down the analog parts of the
LTC2942, reducing the current consumption to less than
1A. All analog circuits are inoperative while the values
in the registers are retained. Note that any charge flowing
while B[0] is 1 is not measured and the charge information
below 1LSB of the accumulated charge register is lost.
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