參數(shù)資料
型號: LTC2859CDD#TRPBF
廠商: Linear Technology
文件頁數(shù): 4/18頁
文件大?。?/td> 0K
描述: IC TXRX RS485 20MBPS 10-DFN
標準包裝: 2,500
類型: 收發(fā)器
驅(qū)動器/接收器數(shù): 1/1
規(guī)程: RS485
電源電壓: 4.5 V ~ 5.5 V
安裝類型: 表面貼裝
封裝/外殼: 10-WFDFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 10-DFN(3x3)
包裝: 帶卷 (TR)
LTC2859/LTC2861
12
285961fc
The integrated termination resistor has a high frequency
response which does not limit performance at the maxi-
mum specified data rate. Figure 12 shows the magnitude
and phase of the termination impedance vs frequency. The
termination resistor cannot be enabled by TE if the device
is unpowered or in thermal shutdown mode.
Supply Current
The unloaded static supply currents in the LTC2859/
LTC2861areverylow—typicallyunder700Aforallmodes
of operation without the internal terminator enabled. In
applications with resistively terminated cables, the supply
currentisdominatedbythedriverload.Forexample,when
usingtwo120terminatorswithadifferentialdriveroutput
voltage of 2V, the DC current is 33mA, which is sourced
by the positive voltage supply. This is true whether the
terminatorsareexternalorinternalsuchasintheLTC2859/
LTC2861. Power supply current increases with toggling
data due to capacitive loading and this term can increase
significantly at high data rates. Figure 13 shows supply
current vs data rate for two different capacitive loads (for
the circuit configuration of Figure 3).
High Speed Considerations
A ground plane layout is recommended for the LTC2859/
LTC2861. A 0.1F bypass capacitor less than one quarter
inch away from the VCC pin is also recommended. The PC
board traces connected to signals A/B and Z/Y (LTC2861)
shouldbesymmetricalandasshortaspossibletomaintain
good differential signal integrity. To minimize capacitive
effects, the differential signals should be separated by
more than the width of a trace and should not be routed
on top of each other if they are on different signal planes.
Care should be taken to route outputs away from any sen-
sitive inputs to reduce feedback effects that might cause
noise, jitter, or even oscillations. For example, in the full
duplex LTC2861, DI and A/B should not be routed near
the driver or receiver outputs.
The logic inputs of the LTC2859/LTC2861 have 50mV of
hysteresis to provide noise immunity. Fast edges on the
outputscancauseglitchesinthegroundandpowersupplies
whichareexacerbatedbycapacitiveloading.Ifalogicinput
is held near its threshold (typically 1.5V), a noise glitch
Figure 11. Termination Resistance
vs Common Mode Voltage
Figure 12. Termination Magnitude
and Phase vs Frequency
Figure 13. Supply Current vs Data Rate
applicaTions inFormaTion
COMMON MODE VOLTAGE (V)
–10
RESIST
ANCE
()
130
140
10
285961 F11
120
110
–5
0
5
15
150
10–1
100
FREQUENCY (MHz)
MAGNITUDE
()
PHASE
(°)
101
80
95
110
125
140
155
170
185
–75
–60
–45
–30
–15
0
15
30
285455 F12
MAGNITUDE
PHASE
105
DATA RATE (kbps)
102
45
50
55
60
65
70
75
CURRENT
(mA)
103
104
285961 F13
RDIFF = 54
CL = 1000pF
CL = 100pF
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