參數(shù)資料
型號(hào)： LTC2481CDD#PBF
廠商： Linear Technology
文件頁(yè)數(shù)： 10/40頁(yè)
文件大?。?/td> 0K
描述： IC ADC 16BIT I2C 10-DFN
標(biāo)準(zhǔn)包裝： 121
位數(shù)： 16
采樣率（每秒）： 7.5
數(shù)據(jù)接口： I²C，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 480µW
電壓電源： 單電源
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 10-WFDFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 10-DFN（3x3）
包裝： 管件
輸入數(shù)目和類型： 2 個(gè)單端，雙極；1 個(gè)差分，雙極
產(chǎn)品目錄頁(yè)面： 1348 (CN2011-ZH PDF)
配用： DC951A-ND - BOARD DELTA SIGMA ADC LTC2481
LTC2481
18
2481fc
APPLICATIONS INFORMATION
Continuous Read/Write
Once the conversion cycle is concluded, the LTC2481 can
be written to then read from, using the repeated Start (Sr)
command.
Figure 7 shows a cycle which begins with a data Write, a
repeated start, followed by a read, and concluded with a
stop command. The following conversion begins after all 24
bits are read out of the device or after the STOP command
and uses the newly programmed conguration data.
Discarding a Conversion Result and Initiating a New
Conversion with Optional Conguration Updating
At the conclusion of a conversion cycle, a Write cycle
can be initiated. Once the Write cycle is acknowledged,
a stop (P) command initiates a new conversion. If a new
conguration is required, this data can be written into the
device and a stop command initiates a new conversion,
see Figure 8.
Synchronizing Multiple LTC2481s with the Global
Address Call
In applications where several LTC2481s are used on the
same I2C bus, all LTC2481s can be synchronized with the
global address call. To achieve this, rst all the LTC2481s
must have completed the conversion cycle. The master
issues a Start, followed by the LTC2481 global address
1110111 and a Write request. All LTC2481s will be selected
and acknowledge the request. The master then sends
the write byte (Optional) and ends the Write operation
with a STOP. This will update the conguration registers
(if a write byte was sent) and initiate a new conversion
simultaneously on all the LTC2481s, as shown in Figure 9.
In order to synchronize the start of conversion without
affecting the conguration registers, the Write operation
can be aborted with a STOP. This initiates a new conversion
on all the LTC2481s without changing the conguration
registers.
Figure 5. The LTC2481 Conversion Sequence
Figure 6. Consecutive Reading at the Same Conguration
Figure 7. Write, Read, Start Conversion
S
ACK
DATA
Sr
DATA TRANSFERRING
P
SLEEP
DATA INPUT/OUTPUT
CONVERSION
7-BIT ADDRESS
R/W
2481 F05
7-BIT ADDRESS
CONVERSION
SLEEP
DATA OUTPUT
7-BIT ADDRESS
SS
RR
ACK
READ
PP
2481 F06
7-BIT ADDRESS
CONVERSION
ADDRESS
SLEEP
DATA OUTPUT
DATA INPUT
7-BIT ADDRESS
S
R
W ACK
ACK
WRITE
Sr
P
READ
2481 F08
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