參數(shù)資料
型號(hào)： LTC2411CMS
英文描述： Analog-to-Digital Converter， 24-Bit
中文描述： 模擬到數(shù)字轉(zhuǎn)換器，24比特
文件頁(yè)數(shù)： 4/40頁(yè)
文件大小： 450K
代理商： LTC2411CMS
LTC2411
12
When the VCC voltage rises above this critical threshold,
the converter creates an internal power-on-reset (POR)
signal with a duration of approximately 1ms. The POR
signal clears all internal registers. Following the POR
signal, the LTC2411 starts a normal conversion cycle and
follows the succession of states described above. The first
conversion result following POR is accurate within the
specifications of the device if the power supply voltage is
restored within the operating range (2.7V to 5.5V) before
the end of the POR time interval.
Reference Voltage Range
This converter accepts a truly differential external refer-
ence voltage. The absolute/common mode voltage speci-
fication for the REF+ and REF– pins covers the entire range
from GND to VCC. For correct converter operation, the
REF+ pin must always be more positive than the REF– pin.
The LTC2411 can accept a differential reference voltage
from 0.1V to VCC. The converter output noise is deter-
mined by the thermal noise of the front-end circuits, and
as such, its value in nanovolts is nearly constant with
reference voltage. A decrease in reference voltage will not
significantly improve the converter’s effective resolution.
On the other hand, a reduced reference voltage will im-
prove the converter’s overall INL performance. A reduced
reference voltage will also improve the converter perfor-
mance when operated with an external conversion clock
(external FO signal) at substantially higher output data
rates.
Input Voltage Range
The analog input is truly differential with an absolute/
common mode range for the IN+ and IN– input pins
extending from GND – 0.3V to VCC + 0.3V. Outside
these limits the ESD protection devices begin to turn on
and the errors due to input leakage current increase
rapidly. Within these limits the LTC2411 converts the
bipolar differential input signal, VIN = IN+ – IN–, from
– FS = – 0.5 VREF to +FS = 0.5 VREF where VREF =
REF+ – REF–. Outside this range the converter indicates the
overrange or the underrange condition using distinct
output codes.
Input signals applied to IN+ and IN– pins may extend by
300mV below ground and above VCC. In order to limit any
fault current, resistors of up to 5k may be added in series
with the IN+ and IN– pins without affecting the perfor-
mance of the device. In the physical layout, it is important
to maintain the parasitic capacitance of the connection
between these series resistors and the corresponding pins
as low as possible; therefore, the resistors should be
located as close as practical to the pins. In addition, series
resistors will introduce a temperature dependent offset
error due to the input leakage current. A 1nA input leakage
current will develop a 1ppm offset error on a 5k resistor if
VREF = 5V. This error has a very strong temperature
dependency.
Output Data Format
The LTC2411 serial output data stream is 32 bits long. The
first 3 bits represent status information indicating the sign
and conversion state. The next 24 bits are the conversion
result, MSB first. The remaining 5 bits are sub LSBs beyond
the 24-bit level that may be included in averaging or dis-
carded without loss of resolution. The third and fourth bits
together are also used to indicate an underrange condition
(the differential input voltage is below – FS) or an overrange
condition (the differential input voltage is above + FS).
Bit 31 (first output bit) is the end of conversion (EOC)
indicator. This bit is available at the SDO pin during the
conversion and sleep states whenever the CS pin is LOW.
This bit is HIGH during the conversion and goes LOW
when the conversion is complete.
Bit 30 (second output bit) is a dummy bit (DMY) and is
always LOW.
Bit 29 (third output bit) is the conversion result sign indi-
cator (SIG). If VIN is >0, this bit is HIGH. If VIN is <0, this
bit is LOW.
Bit 28 (fourth output bit) is the most significant bit (MSB)
of the result. This bit in conjunction with Bit 29 also
provides the underrange or overrange indication. If both
Bit 29 and Bit 28 are HIGH, the differential input voltage is
above +FS. If both Bit 29 and Bit 28 are LOW, the
differential input voltage is below –FS.
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