參數(shù)資料
型號(hào): LTC2287CUP#TRPBF
廠商: Linear Technology
文件頁(yè)數(shù): 1/28頁(yè)
文件大?。?/td> 0K
描述: IC ADC DUAL 10BIT 40MSPS 64QFN
標(biāo)準(zhǔn)包裝: 2,000
位數(shù): 10
采樣率(每秒): 40M
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
功率耗散(最大): 285mW
電壓電源: 單電源
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 64-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 64-QFN(9x9)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 2 個(gè)單端,雙極; 2 個(gè)差分, 雙極
LTC2288/LTC2287/LTC2286
1
228876fa
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
FEATURES
DESCRIPTIO
U
APPLICATIO S
U
TYPICAL APPLICATIO
U
Integrated Dual 10-Bit ADCs
Sample Rate: 65Msps/40Msps/25Msps
Single 3V Supply (2.7V to 3.4V)
Low Power: 400mW/235mW/150mW
61.8dB SNR
85dB SFDR
110dB Channel Isolation at 100MHz
Multiplexed or Separate Data Bus
Flexible Input: 1VP-P to 2VP-P Range
575MHz Full Power Bandwidth S/H
Clock Duty Cycle Stabilizer
Shutdown and Nap Modes
Pin Compatible Family
105Msps: LTC2282 (12-Bit), LTC2280 (10-Bit)
80Msps: LTC2294 (12-Bit), LTC2289 (10-Bit)
65Msps: LTC2293 (12-Bit), LTC2288 (10-Bit)
40Msps: LTC2292 (12-Bit), LTC2287 (10-Bit)
25Msps: LTC2291 (12-Bit), LTC2286 (10-Bit)
10Msps: LTC2290 (12-Bit), LTC2292 (14-Bit)
64-Pin (9mm
× 9mm) QFN Package
Dual 10-Bit, 65/40/25Msps
Low Noise 3V ADCs
The LTC
2288/LTC2287/LTC2286 are 10-bit 65Msps/
40Msps/25Msps, low noise dual 3V A/D converters de-
signed for digitizing high frequency, wide dynamic range
signals. The LTC2288/LTC2287/LTC2286 are perfect for
demanding imaging and communications applications
with AC performance that includes 61.8dB SNR and 85dB
SFDR for signals at the Nyquist frequency.
DC specs include
±0.1LSB INL (typ), ±0.05LSB DNL (typ)
and
±0.6 LSB INL, ±0.5 LSB DNL over temperature. The
transition noise is a low 0.07LSBRMS.
A single 3V supply allows low power operation. A separate
output supply allows the outputs to drive 0.5V to 3.6V
logic. An optional multiplexer allows both channels to
share one digital output bus.
A single-ended CLK input controls converter operation. An
optional clock duty cycle stabilizer allows high perfor-
mance at full speed for a wide range of clock duty cycles.
LTC2288: SNR vs Input Frequency,
–1dB, 2V Range, 65Msps
+
INPUT
S/H
ANALOG
INPUT A
ANALOG
INPUT B
CLK A
CLK B
10-BIT
PIPELINED
ADC CORE
CLOCK/DUTY CYCLE
CONTROL
OUTPUT
DRIVERS
OVDD
OGND
MUX
D9A
D0A
OVDD
OGND
228876 TA01
D9B
D0B
+
OUTPUT
DRIVERS
INPUT
S/H
10-BIT
PIPELINED
ADC CORE
CLOCK/DUTY CYCLE
CONTROL
INPUT FREQUENCY (MHz)
0
SNR
(dBFS)
59.5
60.5
200
228876 TA02
58.5
57.5
50
100
150
62.5
61.5
Wireless and Wired Broadband Communication
Imaging Systems
Spectral Analysis
Portable Instrumentation
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