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參數(shù)資料
| 型號(hào)： | LTC2286UP |
| 廠商： | Linear Technology Corporation |
| 英文描述： | Dual 10-Bit, 65/40/25Msps Low Noise 3V ADCs |
| 中文描述： | 雙10位，65/40/25Msps低噪聲3V的模數(shù)轉(zhuǎn)換器 |
| 文件頁數(shù)： | 11/28頁 |
| 文件大?。?/td> | 886K |
| 代理商： | LTC2286UP |
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LTC2288/LTC2287/LTC2286
11
228876f
PIU
A
INA+
(Pin 1):
Channel A Positive Differential Analog
Input.
A
INA–
(Pin 2):
Channel A Negative Differential Analog
Input.
REFHA (Pins 3, 4):
Channel A High Reference. Short
together and bypass to Pins 5, 6 with a 0.1
μ
F ceramic chip
capacitor as close to the pin as possible. Also bypass to
Pins 5, 6 with an additional 2.2
μ
F ceramic chip capacitor
and to ground with a 1
μ
F ceramic chip capacitor.
REFLA (Pins 5, 6):
Channel A Low Reference. Short
together and bypass to Pins 3, 4 with a 0.1
μ
F ceramic chip
capacitor as close to the pin as possible. Also bypass to
Pins 3, 4 with an additional 2.2
μ
F ceramic chip capacitor
and to ground with a 1
μ
F ceramic chip capacitor.
V
DD
(Pins 7, 10, 18, 63):
Analog 3V Supply. Bypass to
GND with 0.1
μ
F ceramic chip capacitors.
CLKA (Pin 8):
Channel A Clock Input. The input sample
starts on the positive edge.
CLKB (Pin 9):
Channel B Clock Input. The input sample
starts on the positive edge.
REFLB (Pins 11, 12):
Channel B Low Reference. Short
together and bypass to Pins 13, 14 with a 0.1
μ
F ceramic
chip capacitor as close to the pin as possible. Also bypass
to Pins 13, 14 with an additional 2.2
μ
F ceramic chip ca-
pacitor and to ground with a 1
μ
F ceramic chip capacitor.
REFHB (Pins 13, 14):
Channel B High Reference. Short
together and bypass to Pins 11, 12 with a 0.1
μ
F ceramic
chip capacitor as close to the pin as possible. Also bypass
to Pins 11, 12 with an additional 2.2
μ
F ceramic chip ca-
pacitor and to ground with a 1
μ
F ceramic chip capacitor.
A
INB–
(Pin 15):
Channel B Negative Differential Analog
Input.
A
INB+
(Pin 16):
Channel B Positive Differential Analog
Input.
GND (Pins 17, 64):
ADC Power Ground.
SENSEB (Pin 19):
Channel B Reference Programming Pin.
Connecting SENSEB to V
CMB
selects the internal reference
and a
±
0.5V input range. V
DD
selects the internal reference
and a
±
1V input range. An external reference greater than
0.5V and less than 1V applied to SENSEB selects an input
range of
±
V
SENSEB
.
±
1V is the largest valid input range.
V
CMB
(Pin 20):
Channel B 1.5V Output and Input Common
Mode Bias. Bypass to ground with 2.2
μ
F ceramic chip
capacitor. Do not connect to V
CMA
.
LTC2286: I
OVDD
vs Sample Rate,
5MHz Sine Wave Input, –1dB,
O
VDD
= 1.8V
LTC2286: I
VDD
vs Sample Rate,
5MHz Sine Wave Input, –1dB
LTC2286: SFDR vs Input Level,
f
IN
= 5MHz, 2V Range, 25Msps
TYPICAL PERFOR U
SAMPLE RATE (Msps)
I
V
228876 G45
70
60
50
40
30
0
10
20
5
15
25
30
35
2V RANGE
1V RANGE
0
10
SAMPLE RATE (Msps)
20
5
15
25
30
35
I
O
228876 G46
6
4
2
0
INPUT LEVEL (dBFS)
–60
0
S
20
10
40
30
60
50
80
70
120
110
–50
–40
–30
dBFS
dBc
–20
228876 G44
–10
0
100
90
80dBc SFDR
REFERENCE LINE
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LTC2287 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:Dual 10-Bit, 65/40/25Msps Low Noise 3V ADCs |
| LTC2287CUP | 制造商:Linear Technology 功能描述:ADC Dual Pipelined 40Msps 10-bit Parallel 64-Pin QFN EP |
| LTC2287CUP#PBF | 功能描述:IC ADC DUAL 10BIT 40MSPS 64QFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個(gè)單端，單極 |
| LTC2287CUP#TR | 制造商:Linear Technology 功能描述:ADC Dual Pipelined 40Msps 10-bit Parallel 64-Pin QFN EP T/R |
| LTC2287CUP#TRPBF | 功能描述:IC ADC DUAL 10BIT 40MSPS 64QFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個(gè)單端，單極 |
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