參數(shù)資料
型號: LTC2205IUK-14
廠商: LINEAR TECHNOLOGY CORP
元件分類: ADC
英文描述: 14-Bit, 65Msps ADC
中文描述: 1-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC48
封裝: 7 X 7 MM, PLASTIC, MO-220WKKD-2, QFN-48
文件頁數(shù): 21/28頁
文件大小: 1563K
代理商: LTC2205IUK-14
LTC2205-14
21
220514fa
Figure 12. Functional Equivalent of Digital Output Randomizer
Data Format
The LTC2205-14 parallel digital output can be selected
for offset binary or 2’s complement format. The format
is selected with the MODE pin. This pin has a four level
logic input, centered at 0, 1/3V
DD
, 2/3V
DD
and V
DD
. An
external resistor divider can be user to set the 1/3V
DD
and 2/3V
DD
logic levels. Table 1 shows the logic states
for the MODE pin.
Table 1. MODE Pin Function
MODE
0(GND)
1/3V
DD
2/3V
DD
V
DD
OUTPUT FORMAT
Offset Binary
Offset Binary
2’s Complement
2’s Complement
CLOCK DUTY CYCLE
STABILIZER
Off
On
On
Off
Overflow Bit
An overflow output bit (OF) indicates when the converter
is over-ranged or under-ranged. A logic high on the OF
pin indicates an overflow or underflow.
Output Clock
The ADC has a delayed version of the encode input available
as a digital output. Both a noninverted version, CLKOUT+
and an inverted version CLKOUT– are provided. The
CLKOUT+/CLKOUT– can be used to synchronize the con-
verter data to the digital system. This is necessary when
using a sinusoidal encode. Data can be latched on the
rising edge of CLKOUT+ or the falling edge of CLKOUT–.
CLKOUT+ falls and CLKOUT– rises as the data outputs
are updated.
Digital Output Randomizer
Interference from the ADC digital outputs is sometimes
unavoidable. Interference from the digital outputs may be
from capacitive or inductive coupling or coupling through
the ground plane. Even a tiny coupling factor can result in
discernible unwanted tones in the ADC output spectrum.
By randomizing the digital output before it is transmitted
off chip, these unwanted tones can be randomized, trading
a slight increase in the noise floor for a large reduction in
unwanted tone amplitude.
APPLICATIONS INFORMATION
CLKOUT
OF
D13/D0
D12/D0
D2/D0
D1/D0
D0
D0
D1
RAND = HIGH,
SCRAMBLE
ENABLED
D2
D12
D13
OF
LTC2205-14
CLKOUT
RAND
220514 F12
The digital output is “Randomized” by applying an exclu-
sive-OR logic operation between the LSB and all other data
output bits. To decode, the reverse operation is applied;
that is, an exclusive-OR operation is applied between the
LSB and all other bits. The LSB, OF and CLKOUT output
are not affected. The output Randomizer function is active
when the RAND pin is high.
Output Driver Power
Separate output power and ground pins allow the output
drivers to be isolated from the analog circuitry. The power
supply for the digital output buffers, OV
DD
, should be tied
to the same power supply as for the logic being driven.
OV
DD
can be powered with any logic voltage up to the V
DD
of the ADC. OGND can be powered with any voltage from
ground up to 1V and must be less than OV
DD
. The logic
outputs will swing between OGND and OV
DD
.
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