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參數(shù)資料
型號: LTC2175IUKG-14#PBF
廠商: Linear Technology
文件頁數(shù): 30/34頁
文件大小: 0K
描述: IC ADC 14BIT SER 125MSPS 52-QFN
標準包裝: 45
位數(shù): 14
采樣率(每秒): 125M
數(shù)據(jù)接口: Serial LVDS
轉換器數(shù)目: 4
功率耗散(最大): 646mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 52-WFQFN 裸露焊盤
供應商設備封裝: 52-QFN(7x8)
包裝: 管件
輸入數(shù)目和類型: 2 Differential; 2 Single-Ended
配用: DC1371A-ND - BOARD USB DATA ACQUISITION HS
5
21754314fa
LTC2175-14/
LTC2174-14/LTC2173-14
DigiTal inpuTs anD ouTpuTs The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 5)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
ENCODE INPUTS (ENC+, ENC)
Differential Encode Mode (ENCNot Tied to GND)
VID
Differential Input Voltage
(Note 8)
l
0.2
V
VICM
Common Mode Input Voltage
Internally Set
Externally Set (Note 8)
l
1.1
1.2
1.6
V
VIN
Input Voltage Range
ENC+, ENCto GND
l
0.2
3.6
V
RIN
Input Resistance
(See Figure 10)
10
CIN
Input Capacitance
3.5
pF
Single-Ended Encode Mode (ENCTied to GND)
VIH
High Level Input Voltage
VDD = 1.8V
l
1.2
V
VIL
Low Level Input Voltage
VDD = 1.8V
l
0.6
V
VIN
Input Voltage Range
ENC+ to GND
l
0
3.6
V
RIN
Input Resistance
(See Figure 11)
30
CIN
Input Capacitance
3.5
pF
DIGITAL INPUTS (CS, SDI, SCK in Serial or Parallel Programming Mode. SDO in Parallel Programming Mode)
VIH
High Level Input Voltage
VDD = 1.8V
l
1.3
V
VIL
Low Level Input Voltage
VDD = 1.8V
l
0.6
V
IIN
Input Current
VIN = 0V to 3.6V
l
–10
10
A
CIN
Input Capacitance
3
pF
SDO OUTPUT (Serial Programming Mode. Open-Drain Output. Requires 2kΩ Pull-Up Resistor if SDO is Used)
ROL
Logic Low Output Resistance to GND
VDD = 1.8V, SDO = 0V
200
Ω
IOH
Logic High Output Leakage Current
SDO = 0V to 3.6V
l
–10
10
A
COUT
Output Capacitance
3
pF
DIGITAL DATA OUTPUTS
VOD
Differential Output Voltage
100Ω Differential Load, 3.5mA Mode
100Ω Differential Load, 1.75mA Mode
l
247
125
350
175
454
250
mV
VOS
Common Mode Output Voltage
100Ω Differential Load, 3.5mA Mode
100Ω Differential Load, 1.75mA Mode
l
1.125
1.250
1.375
V
RTERM
On-Chip Termination Resistance
Termination Enabled, OVDD = 1.8V
100
Ω
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