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參數(shù)資料
| 型號(hào)： | LTC1855IG#PBF |
| 廠商： | Linear Technology |
| 文件頁(yè)數(shù)： | 7/24頁(yè) |
| 文件大小： | 0K |
| 描述： | IC ADC 14BIT 8CH 100KSPS 28SSOP |
| 標(biāo)準(zhǔn)包裝： | 47 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 100k |
| 數(shù)據(jù)接口： | MICROWIRE?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 40mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SSOP（0.209"，5.30mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-SSOP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 8 個(gè)單端，雙極；4 個(gè)差分，雙極 |
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15
LTC1854/LTC1855/LTC1856
185456fa
Figure 4. Bipolar Transfer Characteristics
18545 F04
011...111
011...110
000...001
000...000
111...111
111...110
100...001
100...000
FS – 1LSB
– (FS – 1LSB)
INPUT VOLTAGE (V)
OUTPUT
CODE
available at VREF (Pin 15). The internal reference can be
overdriven with an external reference if more accuracy is
needed. The buffer output drives the internal DAC and is
available at REFCOMP (Pin 16). The REFCOMP pin can be
used to drive a steady DC load of less than 2mA. Driving
an AC load is not recommended because it can cause the
performance of the converter to degrade.
successive integer LSB values (i.e., –FS+0.5LSB,
–FS+1.5LSB, –FS+2.5LSB, … FS–1.5LSB, FS–0.5LSB).
The output is two’s complement binary with:
1
FS
FS)
65566
20V
65536
305.2 V
LSB
==
=
–(–
m
In applications where absolute accuracy is important,
offset and full-scale errors can be adjusted to zero during
a calibration sequence. Offset error must be adjusted
before full-scale error. Zero offset is achieved by adjusting
the offset applied to the “–” input. For single-ended inputs,
this offset should be applied to the COM pin. For differen-
tial inputs, the “–” input is dictated by the MUX address.
For zero offset error, apply – 0.5LSB to the “+” input and
adjust the offset at the “–” input until the output code
flickers between 0000 0000 0000 0000 and 1111 1111
1111 1111 for the LTC1856, between 00 0000 0000 0000
and 11 1111 1111 1111 for the LTC1855 and between
0000 0000 0000 and 1111 1111 1111 for the LTC1854.
For full-scale adjustment, an input voltage of FS – 1.5LSBs
should be applied to the “+” input and the appropriate
reference adjusted until the output code flickers between
0111 1111 1111 1110 and 0111 1111 1111 1111 for the
LTC1856, between 01 1111 1111 1110 and 01 1111 1111
1111 for the LTC1855 and between 0111 1111 1110 and
0111 1111 1111 for the LTC1854.
These adjustments as well as the factory trims affect all
channels. The channel-to-channel offset and gain error
matching are guaranteed by design to meet the specifica-
tions in the Converter Characteristics table.
APPLICATIO S I FOR ATIO
WU
UU
Figure 3. Internal or External Reference Source
2.5V
REFERENCE
18545 F03
12-/14-/16-BIT
CAPACITIVE DAC
1.6384X BUFFER
8k
VREF
1
μF
15
2.5V
16 REFCOMP
0.1
μF
4.096V
10
μF
For minimum code transition noise the VREF pin and the
REFCOMP pin should each be decoupled with a capacitor
to filter wideband noise from the reference and the buffer.
FULL SCALE AND OFFSET
Figure 4 shows the ideal input/output characteristics for
the LTC1856. The code transitions occur midway between
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