參數(shù)資料
型號: LTC1760CFW
廠商: LINEAR TECHNOLOGY CORP
元件分類: 電源管理
英文描述: Dual Smart Battery System Manager
中文描述: 3-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO48
封裝: 6.10 MM, PLASTIC, TSSOP-48
文件頁數(shù): 6/44頁
文件大小: 379K
代理商: LTC1760CFW
LTC1760
6
sn1760 1760is
ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifications are at T
A
= 25
°
C. V
DCIN
= 20V, V
BAT1
= 12V, V
BAT2
= 12V, V
VDDS
= 3.3V, V
VCC2
= 5.2V
unless otherwise noted.
The
G
denotes the specifications which apply over the full operating
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2.
Battery voltage must be adequate to drive gates of power path
P-channel FET switches. This does not affect charging voltage of the
battery, which can be zero volts during wake-up charging.
Note 3.
DCIN, BAT1, BAT2 are held at 12V and GDCI, GB1I, GB2I are
forced to 10.5V. SCP is set at 12V to measure source current at GDCI,
GB1I and GB2I. SCP is set at 11.9V to measure sink current at GDCI, GB1I
and GB2I.
Note 4.
Extrapolated from testing with C
L
= 50pF.
SYMBOL
PARAMETER
SCL/SCL1/SCL2/SDA/SDA1/ SDA2/
SMBALERT Power Down Leakage.
CONDITIONS
V
VCC2
= 0V, V
VDDS
= 0V,
V
SCL
, V
SCL1
, V
SCL2
, V
SDA
,
V
SDA1
, V
SDA2
, V
SMBALERT
= 5.5V
I
PULLUP
= 500
μ
A
V
SMBALERT
= 0.4V
MIN
TYP
MAX
2
UNITS
G
uA
SMBALERT Output Low Voltage (V
OL
)
SMBALERT Output Pull-Up Current
V
DDS
Input Low Voltage (V
IL
)
V
DDS
Input High Voltage (V
IH
)
V
DDS
Operating Voltage
V
DDS
Operating Current
MODE Input Low Voltage (V
IL
)
MODE Input High Voltage (V
IH
)
MODE Input Current (I
IH
)
MODE Input Current (I
IL
)
Charger Timing
t
TIMEOUT
Timeout for Wake-Up Charging and
Controlled Charging.
t
QUERY
Sampling Rate used by the LTC1760 to
Update Charging Parameters.
SMBus Timing
SCL Serial-Clock High Period(t
HIGH
)
SCL Serial-Clock Low Period (t
LOW
)
SDA/SCL Rise Time(t
r
)
SDA/SCL Fall Time(t
f
)
SMBus Accelerator Trip Voltage Range
Start-Condition Setup Time(t
SU:STA
)
Start-Condition Hold Time(t
HD:STA
)
SDA to SCL Rising-Edge
Setup Time(t
SU:DAT
)
SDA to SCL Falling-Edge Hold Time,
Slave Clocking in Data (t
HD:DAT
)
t
TIMEOUT_SMB
The LTC1760 will Release the SMBus
and Terminate the Current Master or
Slave Command if the Command is not
Completed Before this Time
G
0.4
17.5
1.5
V
3.5
10
μ
A
V
V
V
μ
A
V
V
μ
A
μ
A
V
IL_VDDS
V
IH_VDDS
G
G
G
2.6
3
5.5
18
V
SCL
, V
SDA
= V
VDDS
, V
VDDS
= 5V
V
VCC2
= 4.85V
V
VCC2
= 4.85V
MODE = V
VCC2
0.7V, V
VCC2
= 4.85V
MODE = V
VCC2
0.3V, V
VCC2
= 4.85V
V
IL_MODE
V
IH_MODE
G
V
VCC2
0.3
G
V
VCC2
0.7
–1
–1
G
1
1
G
G
140
175
210
sec
1
sec
At I
PULLUP
= 350
μ
A, C
LOAD
= 150pF (Note 8)
At I
PULLUP
= 350
μ
A, C
LOAD
= 150pF (Note 8)
C
LOAD
= 150pF, RPU = 9.31k (Note 8)
C
LOAD
= 150pF, RPU = 9.31k (Note 8)
G
4
μ
s
μ
s
ns
ns
V
μ
s
μ
s
ns
G
4.7
G
1000
300
1.42
G
G
0.8
4.7
4
250
G
G
G
G
300
ns
G
25
35
ms
Note 5.
Accuracy dependent upon external sense resistor and
compensation components.
Note 6.
The LTC1760C is guaranteed to meet specified performance from
0
°
C to 70
°
C and is designed, characterized and expected to meet specified
performance at –40
°
C and 85
°
C, but is not tested at these extended
temperature limits.
Note 7.
Charger servos to the value reported by a Voltage() query. This is
the internal cell voltage measured by the battery electronics and may be
lower than the terminal voltage. See “Operation Section 3.6” for more
information.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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