參數(shù)資料
型號: LTC1710
廠商: Linear Technology Corporation
元件分類: 通用總線功能
英文描述: Synchronous 8-Bit Up/Down Binary Counters 24-PDIP 0 to 70
中文描述: 單片的SMBus雙高邊開關(guān)
文件頁數(shù): 3/8頁
文件大?。?/td> 219K
代理商: LTC1710
3
LTC1710
ELECTRICAL CHARACTERISTICS
T
A
= 25
°
C, V
CC
= SW0D = 5V unless otherwise noted.
SYMBOL
t
ON
PARAMETER
Output Turn-On Time
(100
/1
μ
F Load)
Output Turn-Off Time
(100
/1
μ
F Load)
DATA/CLK Input Low Voltage
AD1 Input Low Voltage
DATA/CLK High Voltage
AD1 Input High Voltage
Data Output Low Voltage
Input Capacitance (DATA, CLK, AD1)
Input Leakage Current (DATA, CLK)
Input Leakage Current (AD1)
SMBus Related Specifications (Note 5)
f
SMB
SMBus Operating Frequency
t
BUF
Bus Free Time Between
Stop and Start
t
SU:STA
Start Condition Setup Time
t
HD:STA
Start Condition Hold Time
t
SU:STO
Stop Condition Setup Time
t
HD: DAT
Data Hold Time
t
SU:DAT
Data Setup Time
t
LOW
Clock Low Period
t
HIGH
Clock High Period
t
f
Clock/Data Fall Time
t
r
Clock/Data Rise Time
I
PULL-UP
Current Through External Pull-Up
Resistor on DATA Pin
CONDITIONS
V
CC
= 2.7V (From ON (Note 6) to V
OUT
= 90% V
CC
)
V
CC
= 5.5V (From ON (Note 6) to V
OUT
= 90% V
CC
)
V
CC
= 2.7V (From OFF (Note 7) to V
OUT
= 10% V
CC
)
V
CC
= 5.5V (From OFF (Note 7) to V
OUT
= 10% V
CC
)
V
CC
= 2.7V to 5.5V
V
CC
= 2.7V to 5.5V
V
CC
= 2.7V to 5.5V
V
CC
= 2.7V to 5.5V
V
CC
= 2.7V to 5.5V, I
PULL-UP
= 350
μ
A
MIN
TYP
200
160
250
250
MAX
UNITS
μ
s
μ
s
μ
s
μ
s
V
V
V
V
V
pF
μ
A
nA
t
OFF
V
IL
G
G
0.6
0.2
V
IH
G
G
1.4
V
CC
– 0.2
V
OL
C
IN
I
IN
G
0.18
5
0.4
G
±
1
±
250
G
10
4.7
100
kHz
μ
s
4.7
4.0
4.0
300
250
4.7
4.0
μ
s
μ
s
μ
s
ns
ns
μ
s
μ
s
ns
ns
μ
A
50
300
1000
350
V
CC
= 2.7V to 5.5V
(Open-Drain Data Pull-Down Current Capacity)
100
The
G
denotes specifications which apply over the full operating
temperature range.
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
Approximately 3% hysteresis is provided to ensure stable operation
and eliminate false triggering by minor V
CC
glitches.
Note 3:
Measured from V
CC
> V
UVLO
to SMBus ready for DATA input.
Note 4:
The oscillator frequency is not tested directly but is inferred from
turn-on time.
Note 5:
SMBus timing specifications are guaranteed but not tested.
Note 6:
ON is enabled upon receiving the Stop condition from the SMBus
master.
Note 7:
OFF is enabled upon receiving the Stop condition from the SMBus
master.
相關(guān)PDF資料
PDF描述
LTC1710C Synchronous 8-Bit Up/Down Binary Counters 24-PDIP 0 to 70
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LTC1710CS8 SMBus Dual Monolithic High Side Switch
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